Presentation is loading. Please wait.

Presentation is loading. Please wait.

ECE 342 – Jose Schutt-Aine 1 ECE 342 Solid-State Devices & Circuits 18. Operational Amplifiers Jose E. Schutt-Aine Electrical & Computer Engineering University.

Similar presentations


Presentation on theme: "ECE 342 – Jose Schutt-Aine 1 ECE 342 Solid-State Devices & Circuits 18. Operational Amplifiers Jose E. Schutt-Aine Electrical & Computer Engineering University."— Presentation transcript:

1 ECE 342 – Jose Schutt-Aine 1 ECE 342 Solid-State Devices & Circuits 18. Operational Amplifiers Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jschutt@emlab.uiuc.edu

2 ECE 342 – Jose Schutt-Aine 2 Operational Amplifiers General terminal configuration with bias Universal importance (e.g. amplification from microphone to loudspeakers)

3 ECE 342 – Jose Schutt-Aine 3 Common configuration with bias implied but not shown Operational Amplifiers Gain=A Signaling 1.Differential input stage 2.Difference between input is amplified

4 ECE 342 – Jose Schutt-Aine 4 2. Zero output impedance Operational Amplifiers Also, op amps are dc (or direct coupled) amplifiers since they are expected to amplify signals with frequency as low as DC. 1. Infinite input impedance Ideal Op Amp 4. Infinite CMRR or zero common-mode gain 3. Infinite open-loop gain A  inf 5. Infinite bandwidth

5 ECE 342 – Jose Schutt-Aine 5 Differential & Common-Mode Signals -Differential input signal v ID =v 2 -v 1 -Common-mode input signal v ICm =0.5(v 1 +v 2 )

6 ECE 342 – Jose Schutt-Aine 6 Ideally, v ICM should be zero to achieve high CMRR. Amplifier will amplify the difference between the two input signals Operational Amplifiers

7 ECE 342 – Jose Schutt-Aine 7 Practical Considerations The output voltage swing of an op amp is limited by the DC power supply. Since op amp can exhibit high gain, power supply voltage fluctuations must be minimized  use decoupling capacitors from power supply

8 ECE 342 – Jose Schutt-Aine 8 Inverting Configuration We introduce R F (or R 2 ) to reduce gain (from inf) When R F is connected to terminal 1, we talk about negative feedback. If R F is tied to terminal 2, we have positive feedback Terminal 2 is tied to ground

9 ECE 342 – Jose Schutt-Aine 9 Inverting Configuration Need to evaluate v o /v I Assume ideal Op-Amp Since gain is infinite: v 1 is virtual ground Note: A is open-loop gain

10 ECE 342 – Jose Schutt-Aine 10 Since input impedance of OP amp is infinite, current through R F is i 1 Inverting Configuration

11 ECE 342 – Jose Schutt-Aine 11 Closed-Loop gain Observe that the closed-loop gain is the ratio of external components  we can make the closed-loop as accurate as we want. Gain is smaller but more accurate. Inverting Configuration

12 ECE 342 – Jose Schutt-Aine 12 We assumed that the OP-amp was ideal. If we assume that the gain A is finite = A Inverting Configuration

13 ECE 342 – Jose Schutt-Aine 13 Still assume infinite input impedance Inverting Configuration Closed-loop gain for inverting configuration

14 ECE 342 – Jose Schutt-Aine 14 The reflected impedance of R F is given by Inverting Configuration since  small

15 ECE 342 – Jose Schutt-Aine 15 Inverting Configuration Since the reflected impedance is so small, v 1 is thus very small and the inverting terminal is said to be a virtual ground in this configuration We see that Note: To minimize the closed-loop gain (G) on the value of the open-loop gain (A), make 1+R F /R 1 << A

16 ECE 342 – Jose Schutt-Aine 16 Input and Output Impedances - If high gain is required, input impedance will be low - Output impedance is zero Inverting Configuration

17 ECE 342 – Jose Schutt-Aine 17 Find closed-loop gain for A=10 3, A=10 4 and A=10 5 assuming R 1 =1 k  and R F =100 k . Assuming v I =0.1 V, find v 1. Example A |G| v 1 Using formulas Note: Since output of inverting configuration is at terminal of VCVS, output impedance of closed-loop amp is zero. 10 3 90.83 -9.08 mV 10 4 99.00 -0.99 mV 10 5 99.90 -0.1 mV

18 ECE 342 – Jose Schutt-Aine 18 Non-Inverting Configuration Assume gain is

19 ECE 342 – Jose Schutt-Aine 19 Infinite input impedance Non-Inverting Configuration

20 ECE 342 – Jose Schutt-Aine 20 Virtual short Non-Inverting Configuration

21 ECE 342 – Jose Schutt-Aine 21 The Buffer Stage Although voltage gain is low, current gain can be quite high. Buffer stage can be used to interface between processors and switches.

22 ECE 342 – Jose Schutt-Aine 22 The Voltage Follower - Unity gain amplifier - 100% negative feedback

23 ECE 342 – Jose Schutt-Aine 23 No feedback with feedback description A(f) A ni (f) Gain A MBOa A MBni Midband gain f 2oa f 2ni 3 dB freq pt GBW oa GBW ni Gain-BW prod Frequency Response – Non-Inverting

24 ECE 342 – Jose Schutt-Aine 24 Frequency Response – Non-Inverting

25 ECE 342 – Jose Schutt-Aine 25 Frequency Response – Non-Inverting

26 ECE 342 – Jose Schutt-Aine 26 Frequency Response – Non-Inverting Gain-Bandwidth product is constant

27 ECE 342 – Jose Schutt-Aine 27 Midband voltage gain is reduced from A MBoa to A MBni The upper 3-dB frequency will be greater than that of the op amp by the same factor of gain reduction. If the low-frequency gain of the op amp is A MBoa = 200,000 and with resistors A MBni = 40, the gain is reduced by a factor of 5,000. If the basic 3-db frequency is 5 Hz, the noninverting 3dB frequency will be 25 kHz. Frequency Response – Non-Inverting

28 ECE 342 – Jose Schutt-Aine 28 Frequency Response – Inverting OP Amp

29 ECE 342 – Jose Schutt-Aine 29 Frequency Response – Inverting OP Amp

30 ECE 342 – Jose Schutt-Aine 30 Frequency Response – Inverting OP Amp

31 ECE 342 – Jose Schutt-Aine 31 Frequency Response – Inverting OP Amp if R F >> R 1

32 ECE 342 – Jose Schutt-Aine 32 Frequency Response – Inverting OP Amp if R F >> R 1 gain-bandwidth is constant if R F ~ R 1,

33 ECE 342 – Jose Schutt-Aine 33 Frequency Response – Inverting OP Amp

34 ECE 342 – Jose Schutt-Aine 34 Example Design an amplifier to couple a microphone to a resistive load. The microphone generates a peak output of 50 mV for a typical voice input level and has a 10-k  output impedance. The output voltage across the 2-k  load is to have a peak value of 10 V. the bandwidth of the voltage gain should be at least 40 kHz. If the GBW of the op amp used is 3  10 6 Hz, calculate the bandwidth of the final design The midband voltage gain is: For a single noninverting stage with this gain, the upper corner frequency is:

35 ECE 342 – Jose Schutt-Aine 35 This value of BW will not work  need 2 stages Example (cont’) Pick first stage gain 10; second stage gain 20. We must then have: and

36 ECE 342 – Jose Schutt-Aine 36 Choose R 21 and R 22 arbitrarily and use above equations to extract R F1 and R F2 ; we get: R F1 = 18 k , R F2 = 38 k  Next, find 3-dB bandwidth of each stage by dividing respective gains into GBW oa or GBW ni Example (cont’)

37 ECE 342 – Jose Schutt-Aine 37 The overall gain is: At 3dB point, magnitude squared of denominator must be 2 From which Example (cont’)


Download ppt "ECE 342 – Jose Schutt-Aine 1 ECE 342 Solid-State Devices & Circuits 18. Operational Amplifiers Jose E. Schutt-Aine Electrical & Computer Engineering University."

Similar presentations


Ads by Google