1. Serial I/O and the HC11

2. Overview General discussion of serial I/O operations oSynchronous vs. asynchronous operations oBaud rate vs. bit rate oTransmission standards 68HC11 capabilities oGeneral description oProgramming and operation Readings: Text, Chapter 10

3. Serial Input and Output Operations A serial data transfer moves one bit at a time between the processor and a peripheral device oA parallel data transfer moves one word at a time (often, 1 word = 1 byte) Why use serial I/O? oSome I/O operations are inherently serial oIf transmission distance is large, parallel data transmission may prove to be too expensive to implement oIf using the phone system, only have the serial option! Cont..

4. Serial Input and Output Operations Interfaces oLogical: performs the parallel-to-serial and serial-to-parallel data conversions oElectrical: Transforms TTL voltage and signal levels to that of the transmission medium Cont..

5. Serial Input and Output Operations Direction of transmission oSimplex: data transfer in one direction only oHalf duplex: transfer is bi-directional, but in only one direction at a time oFull duplex: transfer is bi-directional and can take place in both directions at the same time Transmission timing o For serial I/O, often speak of each data packet as being a character (often ASCII) o Asynchronous:  Transmitter and receiver are not synchronized with respect to the time at which a character is transmitted Cont..

6. Serial Input and Output Operations  Each transmitted character is composed of data bits and framing bits 1. First, transmit start bit(s) 2. Next, transmit data bits sequentially 3. Finally, transmit stop bit(s)  The transmitter may separate characters by random amounts of time  The bit stream for data and framing bits are transmitted at a known rate  A start bit is used to synchronize the receiver to the transmitter for the reception of one character  When no data is being transmitted, transmitter output is idle (active low levels) Cont..

7. Serial Input and Output Operations oSynchronous:  Transmitter and receiver stay in sync at all times through the use of synchronization characters  Start and stop bits are eliminated  Data is transmitted as a continuous stream, with no indication of character boundaries Transmission rates (This is a little confusing, and the book (p. 339) mainly adds to the confusion) obaud = “symbols per second,” named after the inventor of the Baudot telegraph code osymbol = 1 or more bits, encoded for transmission Cont..

8. Serial Input and Output Operations oHere's a frequency-shift-keying (FSK) example; in this case, the frequency determines 1 of 4 possible symbols (2 bits each) obit rate: number of bits transmitted per unit time, usually stated in units of bits per second (bps) oThe baud rate is not necessarily the same as the bit rate, although the terms are sometimes (incorrectly) used interchangeably oSometimes you may need to distinguish between the bit rate for data alone, vs. bit rate including framing bits or sync characters Cont..

9. Serial Input and Output Operations Electrical interface and transmission standards oProblems with transmission  Noise  Different ground connections  Transmission line effects (reflections) oSolutions  Line drivers not at TTL levels  EIA standard transmission circuits  Single-ended, balanced differential, unbalanced differential Line driver configurations [Sho87] Cont..

10. Serial Input and Output Operations Cont.

11. Serial Input and Output Operations oEIA standards include RS232, RS423, RS422, and RS485 oDifferences in the standards include  Mode of transmission (single vs. differential)  Data transmission rates  Type of transmission line and its length

12. 68HC11 serial communications The 68HC11 supports both asynchronous and synchronous serial communications oSCI (serial communications interface) system provides asynchronous transfers oSPI (serial peripheral interface) system provides synchronous transfers oBoth the SCI and the SPI use pins on port D to perform their transfers  SCI uses pins 0 and 1  SPI uses pins 2-5 oPrior to performing either type of serial transfer, the interface must be configured / initialized Cont.

13. 68HC11 serial communications Asynchronous communication oFraming bits  Each data byte is framed with a start bit and one or more stop bits Start bit is always 0 (idle line is always 1) Stop bit is always 1 Different protocols may use 1, 1.5, or 2 stop bits oHC11 always uses 1 stop bit  Data byte is transmitted LSB first oParity  Can be used to detect single-bit errors in the data (do not consider start/stop bits) Cont.

14. 68HC11 serial communications  Usual implementation: append 1 extra bit to the end of the data (parity bit sent after MSB)  Even parity: select the value of the parity bit to cause an even number of 1s  Odd parity: select the value of the parity bit to cause an odd number of 1s  Not directly supported by HC11 Must be implemented in software Peripheral chips (e.g. 8251 UART) do support it Cont.

15. 68HC11 serial communications Cont.

16. 68HC11 serial communications Asynchronous transfers using the SCI oPorts and pins used  Port pin PD1 is the transmit line TxD  Port pin PD0 is the receive line RxD  Data is written and read from SCI data register, SCDR, at address $102F  Port is initialized by setting SCI Control Registers 1 and 2, at addresses $102C and $102D  Desired baud rate based on division factors in the Baud Rate Control Register, address $102B  Port status is reported in register SCSR, at address $102E (not $102F as in Figure 10.5!) Cont..

17. 68HC11 serial communications oNominally transmits 8-bit data words  Can transmit a 9th bit if desired  Software can use 9th bit for parity (parity not automatically generated or checked) Cont..

18. 68HC11 serial communications oConfiguration  Select desired baud rate -- write to baud rate register (bits SCP0-1, SCR0-2)  Select word length and wake up -- write to SCCR1  Select interrupt operations, TxD and RxD operations, etc. -- write to SCCR2 oTransmission procedure  Poll status register or respond to interrupt (read the SCSR)  If using 9-bit data, write 9th bit (bit 8) to T8 in SCCR1  If TDRE=1, write lower 8 bits of data to the SCDR oReceiving procedure  Poll status register or respond to interrupt (read the SCSR)  If RDRF=1, read SCDR  If 9-bit data, read bit 8 from SCCR1 Cont..

19. 68HC11 serial communications Cont..

20. HC11 serial communications oBaud rate selection  Desired baud rate is specified by the combination of baud- rate preselects and baud-rate selects, in the baud rate control register  See HC 11 manual for detailed information (text only presents settings for 8 MHz clock in Figure 10.5):

21. HC11 serial communications Receive errors oOverrun Error  Occurs when new character is received before previous character is read from SCDR  New character is lost  Sets OR flag in SCSR oNoise Error  Receiver samples data line at 16 times the bit rate  If samples in middle don’t match, there may be noise on the line  Sets NF flag in SCSR

22. HC11 serial communications oFraming Error  Occurs when an invalid stop bit is detected  May be due to baud rate mismatch, framing protocol mismatch, or noise  Sets FE flag in SCSR SCISUBS.H *********************************************** * Subroutine to initialize(INIT) SCI for serial * communications at 8 data, no parity, 1 stop * bit. Directly compatible with TERM in * PCbug11 and F7 comm in Iasm11. * All registers returned to calling conditions. Cont..

23. HC11 serial communications * CEN 9/22/93 Initial release ********************************************** INIT PSHX ; Save registers PSHA LDX #REGBAS LDAA #$30 ; 9600 baud, assuming 8 MHz ; clock STAA BAUD,X ; BAUD REGISTER LDAA #$00 ; 8 data bits STAA SCCR1,X ; LDAA #$0C ; No interrupts, enable TX, ; RX, no wakeup Cont..

24. HC11 serial communications STAA SCCR2,X ; LDAA SCSR ; Clear RDRF, Error flags LDAA SCDR ; Clear receive buffer PULA ; Restore registers PULX RTS *********************************************** * Subroutine to receive(REC) a single character * from an initialized SCI serial device. No * echo to screen takes place. * Received character returned in ACCA. No other * registers modified. Cont..

25. HC11 serial communications * CEN 9/23/93 *********************************************** REC PSHX ; Save X register LDX #REGBAS ; Point to register bank NOCH BRCLR SCSR,X,$20,NOCH ; Wait for RDRF LDAA SCDR,X ; Get received character PULX ;Restore X register RTS *********************************************** * Subroutine to transmit(TRS) character from * SCI to serial connected terminal Expects * character to be displayed to be in ACCA upon Cont..

26. HC11 serial communications * entry. * No other registers modified. * CEN 9/23/93 *********************************************** TRS PSHX ; Save X register LDX #REGBAS ; Point to register bank TBNMT BRCLR SCSR,X,$80,TBNMT ; Loop until xmit output buffer empty ; Empty if TDRE flag in SCSR register = 1 STAA SCDR,X ; Write char to output buffer PULX ;Restore incoming X register RTS Cont..

27. HC11 serial communications Synchronous transfers using the SPI oTwo (or more) devices communicate via a serial bus with one device being the "bus master" and the others being "slaves"  For SPI, both devices transmit and receive one byte during each transfer oMaster controls transfers by providing the clocking signals required oAdvantages of synchronous communication  Faster transfers Higher clock rates No start/stop bits Cont..

28. HC11 serial communications oDisadvantages  Must provide clock signal to slaves oUseful for:  Communicating with local peripherals Can use built-in SPI interface  Communicating with other computers or remote peripherals (network) Usually requires special-purpose ICs Cont..

29. HC11 serial communications oBasic SPI operation Cont..

30. HC11 serial communications oSPI serial system (bus topology) Cont..

31. HC11 serial communications SPI Registers SPIE SPI Interrupt Enable SPE SPI System enable DWOM Port D Wire-Or Mode (0=normal, 1=open-drain) MSTR Master/Slave Select (0=slave, 1=master) CPOL Clock Polarity 0=active-high, Cont.. 1=active-low) CPHA Clock Phase Select SPR1,0 SPI Clock Rate Select Bits

32. HC11 serial communications SPI Registers SPIF SPI Interrupt Request WCOLWrite Collision Status Flag MODFSPI Mode Error Interrupt Status Flag DDRD5(Mater) 0 = SS input to detect mode fault 1 = SS is general purpose output Slave = always input DDRD4(Master)0 = SCK output disabled Cont..

33. HC11 serial communications oMaster SPI operation Cont..

34. HC11 serial communications oSlave SPI operation Cont..

35. HC11 serial communications SPI Error Handling oMode Fault  Occurs when more than one device tries to be a master  Detected when the master’s SS input is driven low (by another node trying to be a master)  Sets the MODF flag in the SPSR register  Generates an interrupt if SPIE is set oWrite Collision  Occurs when MCU attempts to write to SPDR while a transfer is taking place Previous data is not overwritten  Sets the WCOL flag in SPSR Cont..

36. HC11 serial communications  Master can prevent this by checking the SPIF flag before writing to SPDR  Slave should check WCOL flag after writing to see if collision occurred Overviewed serial communications oInterfaces oTransmission “standards” 68HC11 implementations oSCI  8 or 9 bit data Rx/Tx Automatically adds start/stop bits  Uses PD0 and PD1 for receive/transmit Cont..

37. HC11 serial communications  Wide range of baud rate support  Use available routines in scisubs.h for “typical” interface oSPI  8 bit data Devices receive and transmit simultaneously  Uses PD2-PD5