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Conversion and Coding (12) 10. Conversion and Coding (12) 10 1100 Conversion.

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Presentation on theme: "Conversion and Coding (12) 10. Conversion and Coding (12) 10 1100 Conversion."— Presentation transcript:

1 Conversion and Coding (12) 10

2 Conversion and Coding (12) 10 1100 Conversion

3 Conversion and Coding (12) 10 1100 Conversion 00010010 Coding (using BCD code for each digit)

4 BCD Adder Design a circuit that calculates the Arithmetic addition of two decimal digits. 9 3 2 + 1 carry

5 BCD Adder Maximum sum is 9+9 + 1 = 19 Max digit Carry from previous digits

6 BCD adder (sum up to 9) NumberCS8S4S2S1 000000 100001 200010 300011 400100 500101 600110 700111 801000 901001

7 BCD adder (sum up to 9) NumberCS8S4S2S1 000000 100001 200010 300011 400100 500101 600110 700111 801000 901001 The sum is the same with BCD adder

8 BCD adder (sum is 10 to 19) NumberCS8S4S2S1 1010000 1110001 1210010 1310011 1410100 1510101 1610110 1710111 1811000 1911001

9 BCD adder (sum is 10 to 19) Number CS8S4S2S1 1010000 1110001 1210010 1310011 1410100 1510101 1610110 1710111 1811000 1911001 KZ8Z4Z2Z1 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 Binary sum BCD adder sum

10 BCD adder (sum is 10 to 19) Number CS8S4S2S1 1010000 1110001 1210010 1310011 1410100 1510101 1610110 1710111 1811000 1911001 KZ8Z4Z2Z1 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 Binary sum BCD adder sum

11 BCD adder (sum is 10 to 19) Number CS8S4S2S1 1010000 1110001 1210010 1310011 1410100 1510101 1610110 1710111 1811000 1911001 KZ8Z4Z2Z1 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 Binary sum BCD adder sum +6

12 Algorithm for BCD Adder If sum is up to 9 Use the regular Adder. If the sum > 9 Use the regular adder and add 6 to the result

13 When is the result > 9 Number KZ8Z4Z2Z1 1001010 1101011 1201100 1301101 1401110 1501111 1610000 1710001 1810010 1910011 Binary sum C = K +

14 When is the result > 9 Number KZ8Z4Z2Z1 1001010 1101011 1201100 1301101 1401110 1501111 1610000 1710001 1810010 1910011 Binary sum C = K + Z8*Z4+

15 When is the result > 9 Number KZ8Z4Z2Z1 1001010 1101011 1201100 1301101 1401110 1501111 1610000 1710001 1810010 1910011 Binary sum C = K + Z8*Z4+ Z8*Z2

16 BCD Adder 4-bit Adder 00 z8 z4z2z1 s8 s4s2s1 Cin K

17 Arithmetic Circuits

18 Half Adder ABSumCarry 0000 0110 1010 1101

19 Half Adder

20 Full Adder ABCinSumCout 00000 00110 01010 01101 10010 10101 11001 11111

21 Full Adder

22 Implementing a Full adder using two half adders

23 Parallel Binary Adder

24 Parallel Binary adder Two Numbers X & Y Each number is represented using 6 bits. [X]=X o X 1 X 2 X 3 X 4 X 5 [Y]=Y o Y 1 Y 2 Y 3 Y 4 Y 5

25 Complete Parallel Adder With Registers D Flip-flops are used to save a single bit A number of D flip-flops are connected in a way to form the binary number, where each bit of that number is saved in a single D flip-flop.

26

27 Example: Sequence of operations in Adding 1001 and 0101 1) [A] = 0000. A CLEAR pulse is applied to CLR of each FF on register A at t 1. 2) [M]  [B]. The first binary number 1001 is transferred from memory to B register on the PGT of the LOAD pulse at t 2. 3) [S]  [A]. With [B] = 1001 and [A] = 0000, the full adders produce a sum of 1001 which is transferred to A register on the PGT of the TRANSFER pulse at t 3. This makes [A] = 1001. 4) [M]  [B]. The second binary number 0101 is transferred from memory to B register on the PGT of the second LOAD pulse at t 4. This makes [B] = 0101. 5) [S]  [A]. With [B] = 0101 and [A] = 1001, the full adders produce a sum of 1110 which is transferred to A register on the PGT of the second TRANSFER pulse at t 5. This makes [A] = 1110.

28 Integrated Circuit Parallel Adder ( IC Parallel Adder ) 4- Bits adder

29 8 – Bit IC Parallel Adder

30 BCD Adder

31 When the sum of two digits is less than or equal to 9 then the ordinary 4-bit adder can be used But if the sum of two digits is greater than 9 then a correction must be added “I.e adding 0110” We need to design a circuit that is capable of doing the correct addition

32 BCD Adder The cases where the sum of two 4-bit numbers is greater than 9 are in the following table: S4S3S3 S2S2 S1S1 S0S0 0101010 0101111 0110012 0110113 0111014 0111115 1000016 1000117 1001018

33 BCD Adder Whenever S 4 =1 (sums greater than 15) Whenever S 3 =1 and either S 2 or S 1 or both are 1 (sums 10 to 15) The previous table can be expressed as: X = S 4 + S 3 ( S 2 + S 1 ) So, whenever X = 1 we should add a correction of 0110 to the sum.

34 0011 0101 0 1 0 0 0 0 0 0 1000 0000 Inputs:[A]=0101, [B]= 0011, C o =0 1 0 0 0 1

35 0110 0111 0 1 1 0 1 1 1 1 1101 0110 Inputs:[A]=0111, [B]= 0110, C o =0 0 0 1 1 1

36 BCD Adder Cascading BCD Adders The previous circuit is used for adding two decimal digits only. That is, “ 7 + 6 = 13”. For adding numbers with several digits, a separate BCD adder for each digit position must be used. For example: 2 4 7 5 3 8 + -------------------- ?

37 Cascading BCD Adders

38 Example Determine the inputs and the outputs when the above circuit is used to add 538 to 247. Assume a CARRY IN = 0 Solution: Represent the decimal numbers in BCD 247 = 0010 0100 0111 538 = 0101 0011 1000 Put these numbers in registers [A] and [B] [A] = 0010 0100 0111 [B] = 0101 0011 1000

39 Example 0 1 1 1 1 0 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 1 0101 1 1000 0 0111 0


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