1. 再谈 EDK 赵峰 上海交通大学微电子学院

2. Knowledge Check What is the MHS file? What does the PlatGen tool do? What tool is used to place executable code in an FPGA block RAM?

3. Answers What is the MHS file? The MHS file is the Microprocessor Hardware Specification; it specifies processors, hardware peripherals, bus connections, and address spaces for the hardware What does the PlatGen tool do? PlatGen takes the MHS file and creates the system and peripheral netlists, HDL wrapper files, BMM file, etc. What tool is used to place executable code in an FPGA block RAM? The Data2Mem tool will take the BMM file and create the proper initialization for the block RAM that is assigned to the executable memory space

4. Knowledge Check How can you add or change configuration settings once the hardware system is build? What does the LibGen tool do? What is the difference between system.bit and download.bit files?

5. Answers How can you add or change configuration settings once the hardware system is build? Select IP Catalog tab, expand related IP peripheral folder, select a desired IP, and double-click on it to add it to the design Select an IP instance in the System Assembly View panel, right click on it, and select desired configuration What does the LibGen tool do? Read MSS file and generate libraries What is the difference between system.bit and download.bit files? The system.bit file contains only hardware description whereas download.bit file contains both hardware description as well as executable software

6. Embedded Development Tool Flow Overview Data2MEM Download Combined Image to FPGA Compiled ELF Compiled BIT RTOS, Board Support Package Embedded Development Kit Instantiate the ‘System Netlist’ and Implement the FPGA ? HDL Entry Simulation/Synthesis Implementation Download Bitstream Into FPGA Chipscope Standard FPGA HW Development Flow VHDL or Verilog System Netlist Include the BSP and Compile the Software Image ? Code Entry C/C++ Cross Compiler Linker Load Software Into FLASH Debugger Standard Embedded SW Development Flow C Code Board Support Package 1 23 Compiled BIT Compiled ELF

7. Embedded System Tools GNU software development tools C/C++ compiler for the MicroBlaze ™ and PowerPC ™ processors (gcc) Debugger for the MicroBlaze and PowerPC processors (gdb) Hardware and software development tools Base System Builder Wizard Hardware netlist generation tool: PlatGen Software Library generation tool: LibGen Simulation model generation tool: SimGen Create/Import Peripherals Wizard Xilinx Microprocessor Debug (XMD) Hardware debugging using ChipScope ™ Pro Analyzer cores Eclipse IDE-based Software Development Kit (SDK) Application code profiling tools Virtual Platform generator: VPGen Flash Writer utility

8. Simulation Generator Hardware Platform Generation Library Generation Embedded Software Development ISE Tools IP Library or User Repository MSS LibGen.a Compiler (GCC).o Linker (GCC) ELF MHS PlatGen Drivers, MDD MPD, PAO PCore HDL System and Wrapper VHD system.BMM Synthesis (XST) NGC NGDBuildUCF NGD MAP NCD, PCF PAR NCD BitGensystem.BIT BitInit download.BIT iMPACT system_BD.BMM SimGen Behavioral VHD Model SimGen Structural VHD Model SimGen Timing VHD Model Simulation IP ModelsISE Models Testbench Stimulus CompEDKLibCompXLib Application Source.c,.h,.s EDK Tool Flow download.CMD EDK SW Libraries

9. Hardware Creation Flow Platform Generator – PlatGen Input file → MHS and MPD MHS file defines the configuration of the embedded processor system including bus architecture, peripherals and processor(s), interrupt request priorities, and address space MPD file defines the configurable parameters with their default values and available ports for a peripheral Output files → system netlist, peripheral netlists, and BMM file Creates the synthesis, HDL, and implementation directories Generates the HDL wrapper files for the peripherals Generates the top-level system HDL file Extracts the peripheral netlists from the EDK install directory Generates the BMM file Calls XST to synthesize the top-level wrapper file

10. Software Flow Library Generation Library Generator – LibGen Input files → MSS Output files → libc.a, libXil.a, libm.a LibGen is generally the first tool run to configure libraries and device drivers The MSS file defines the drivers associated with peripherals, standard input/output devices, interrupt handler routines, and other related software features LibGen configures libraries and drivers with this information and produces an archive of object files: libc.a - Standard C library libXil.a - Xilinx library libm.a - Math functions library

11. GNU Tools: GCC GCC translates C source code into assembly language GCC also functions as the user interface to the GNU assembler and to the GNU linker, calling the assembler and the linker with the appropriate parameters Supported cross-compilers: PowerPC  processor compiler GNU GCC (powerpc-eabi-gcc) Wind River Diab  compiler (dcc) MicroBlaze  processor compiler GNU GCC (mb-gcc) Command line only; uses the settings set through the GUI C files Cross-compiler Assembly files

12. GNU Tools Calls four different executables Preprocessor (cpp0) Language specific c-compiler cc1 C-programming language cc1plus C++ language Assembler mb-as (MicroBlaze  processor) powerpc-eabi-as (PowerPC  processor) Linker and loader mb-ld (MicroBlaze processor) powerpc-eabi-ld (PowerPC processor)

13. GNU Tools: AS Input: Assembly language files File extension:.s Output: Object code File extension:.o Contains Assembled piece of code Constant data External references Debugging information Typically, the compiler automatically calls the assembler Use – Wa switch if the source files are assembly only and use gcc Assembly files Cross-assembler Object files

14. GNU Tools: LD Linker Inputs: Several object files Archived object files (library) Linker script (mapfile) Outputs: Executable image (.ELF) Mapfile (different from linker script) Object files Linker script Linker/Locator ExecutableMap

15. Binutils: Binary Utilities AR Archiver Create, modify, and extract from libraries Used in EDK to combine the object files of the Board Support Package (BSP) in a library Used in EDK to extract object files from different libraries OBJDUMP Display information from object files and executables Header information, memory map Data Disassemble code GNU executables powerpc-eabi-objdump mb-objdump

16. Powerpc-eabi-objdump Memory location Text section Machine code Assembly instructions

17. Address Management Embedded processor design requires you to manage the following: Address map for the peripherals Location of the application code in the memory space Block RAM External memory Memory requirements for your programs are based on the following: The amount of memory required for storing the instructions The amount of memory required for storing the data associated with the program

18. PowerPC Processor Memory and peripherals PPC405 uses 32-bit addresses Special addresses Every PowerPC ™ system should have the boot section starting at 0xFFFFFFFC Default linker options Program space occupies a contiguous address space from 0xFFFF0000 to 0xFFFFFFFF Stack size: 4 KB Heap size: 4 KB 0x0000_0000 0xFFFF_0000 0xFFFF_FFFC Peripherals PLB/OPB Memory Reset Address

19. Advanced User Address Space Different base address, contiguous user address space The user program can run from any memory PLB, OCM, OPB, or LMB To execute a program from any address location other than default, you must provide the compiler gcc with a Program Start Address

20. Advanced User Address Space Different base address, noncontiguous user address space You can place different components of your program in different memories For example, on PowerPC  systems, you can keep your code on instruction cache memory and the data on ZBT memory Noncontiguous executables that represent the application must be created To do this, a linker script must be used

21. Object File Sections What is an object file? An object file is an assembled piece of code Machine language: li r31,0 = 0x3BE0 0000 Constant data There may be references to external objects that are defined elsewhere This file may contain debugging information

22. Object File Sections.text.rodata.sdata2.data.sdata.sbss.bss Text section Read-only data section Small read-only data section (less than eight bytes) Read-write data section Small read-write data section Small uninitialized data section Uninitialized data section

23. Object File Sections.init.fini.ctors.dtors.got2.got.eh_frame Language initialization code Language cleanup code List of functions to be invoked at program startup List of functions to be invoked at program end Pointers to program data Frame unwind information for exception handling

24. Sections Example int ram_data[10] = {0,1,2,3,4,5,6,7,8,9}; /* DATA */ const int rom_data[10] = {9,8,7,6,5,4,3,2,1}; /* RODATA */ int I; /* BSS */ main(){... I = I + 10; /* TEXT */... }

25. Linker Scripts Linker scripts Control the linking process Map the code and data to a specified memory space Set the entry point to the executable Reserve space for the stack Required if the design contains a discontinuous memory space

26. Linker and Locator Flows.text1.data1.bss1.bss2.data2.text2 foo1.o foo2.o Link.text.data.bss 0xFFFF 0xF000 0xEFFF 0xEF00 0x0000 0x1FFF 0x2000 0xEEFF Locate Merged Output Sections Unused Executable Image Code uninitialized data Initialized data

27. Linker Script for the PowerPC Processor Required to control how the program and data are targeted to PLB, OPB, OCM, or extended memory Provide a linker script to the powerpc-eabi- gcc compiler The linker script defines the layout and the start address of each of the sections

28. Linker Script Limitations Allocate space in the.bss section for the stack and the heap The stack and the heap must be placed together at the end of the.bss section Ensure that: The following variables are set to define each section:.sdata: __SDATA_START__, __SDATA_END__.sdata2: __SDATA2_START__, __SDATA2_END__.sbss2: __SBSS2_START__, __SBSS2_END__ The.sdata and.sbss sections are contiguous The.boot section starts at 0xFFFFFFFC The.boot0 section is within a ±24-bit address space of the _boot label The.vector section is aligned on a 64K boundary

29. PowerPC Processor Boot Files Files: boot.S, boot0.S, crt0.S, eabi.S Application entry point at label _boot in boot.S _boot is single jump instruction to _boot0 _boot0 is a few instructions that do a jump to _start in crt0.S _start Clears.bss and.sbss sections Sets up stack on an eight byte alignment Initializes time-base registers to zero Optionally, enable FPU bit in MSR Calls main() –Calls _eabi to set R13 and R2 registers to point to.sdata and.sdata2 sections respectively –Performs user tasks

30. PowerPC Processor Script Example STACKSIZE = 4k; MEMORY { ddr : ORIGIN = 0x00000000, LENGTH = 32m sram : ORIGIN = 0x10000000, LENGTH = 2m flash : ORIGIN = 0x18000000, LENGTH = 32m bram : ORIGIN = 0xffff8000, LENGTH = 32k - 4 boot : ORIGIN = 0xfffffffc, LENGTH = 4 } SECTIONS {.text : { *(.text) } > bram.boot : { *(.boot) } > boot.data : { *(.data) *(.got2) *(.rodata) *(.fixup)} > bram.bss : { *(.bss) } > bram __bss_start = ADDR(.bss); __bss_end = ADDR(.bss) + SIZEOF(.bss); }

31. Sections Command This is where most of the work takes place Output sections are named, and the input sections are grouped and linked together into the output sections Example: Explanation:.text is the name of the output section { *(.text) *.(init) } includes all input sections named text and init from the object files being linked > bram locates the.text output section in the next available memory in the block RAM area.text : { *(.text) *(.init) } > bram

32. Linker Script Generator GUI XPS contains a graphical Linker Script Generator Table-based GUI allows you to define the memory space for any section Launch from Software → Generate Linker Script, or from the Applications Tab, right- click on → Generate Linker Script The tool will create a new linker script (the old script is backed up)

33. Drivers: Level 0 / Level 1 The layered architecture provides seamless integration with … (Layer 2) RTOS application layer (Layer 1) High-level device drivers that are full-featured and portable across operating systems and processors (Layer 0) Low-level drivers for simple use cases Layer 2, RTOS Adaptation Layer 1, High-level Drivers Layer 0, Low-level Drivers

34. Drivers: Level 0 Consists of low-level device drivers Implemented as macros and functions that are designed to allow a developer to create a small system Characteristics: Small memory footprint Little to no error checking is performed Supports primary device features only No support of device configuration parameters Supports multiple instances of a device with base address input to the API Polled I/O only Blocking function calls Header files have “ _l ” in their names (e.g. xuartlite_l.h)

35. Drivers: Level 1 Consists of high-level device drivers Implemented as macros and functions and designed to allow a developer to utilize all of the features of a device Characteristics: Abstract API that isolates the API from hardware device changes Supports device configuration parameters Supports multiple instances of a device Polled and interrupt driven I/O Non-blocking function calls to aid complex applications May have a large memory footprint Typically, provides buffer interfaces for data transfers as opposed to byte interfaces Header files do not have “ _l ” in their names (e.g. xuartlite.h)

36. Comparison Example Uartlite Level 1 XStatus XUartLite_Initialize (XUartLite *InstancePtr, Xuint16 DeviceId) void XUartLite_ResetFifos (XUartLite *InstancePtr) unsigned int XUartLite_Send (XUartLite *InstancePtr, Xuint8 *DataBufferPtr, unsigned int NumBytes) unsigned int XUartLite_Recv (XUartLite *InstancePtr, Xuint8 *DataBufferPtr, unsigned int NumBytes) Xboolean XUartLite_IsSending (XUartLite *InstancePtr) void XUartLite_GetStats (XUartLite *InstancePtr, XUartLite_Stats *StatsPtr) void XUartLite_ClearStats (XUartLite *InstancePtr) XStatus XUartLite_SelfTest (XUartLite *InstancePtr) void XUartLite_EnableInterrupt (XUartLite *InstancePtr) void XUartLite_DisableInterrupt (XUartLite *InstancePtr) void XUartLite_SetRecvHandler (XUartLite *InstancePtr, XUartLite_Handler FuncPtr, void *CallBackRef) void XUartLite_SetSendHandler (XUartLite *InstancePtr, XUartLite_Handler FuncPtr, void *CallBackRef) void XUartLite_InterruptHandler (XUartLite *InstancePtr) Uartlite Level 0 void XUartLite_SendByte (Xuint32 BaseAddress, Xuint8 Data) Xuint8 XUartLite_RecvByte (Xuint32 BaseAddress)

37. Exceptions and Interrupts Exceptions are events detected by the processor that require action by the system software Typically, the result of unexpected error conditions (e.g., bus error) Some exceptions can be programmed to occur (e.g., FIT, PIT) Some exceptions are generated by external devices (e.g., CritInt) Interrupts are automatic control transfers as a result of an exception Execution of the current program is suspended after the current instruction Some context info is saved so execution can return to the current program Execution is transferred to the interrupt handler to service the interrupt The interrupt handler must be registered The interrupt must be enabled

38. Hardware Interrupt Inputs Two external inputs to the IBM PowerPC  405 processor core: Critical interrupt External interrupt Enabled and disabled through the Machine State Register (MSR) MSR(CE) and MSR(EE) Default @RESET is disabled FPGA design adds an interrupt controller for application-specific requirements Supports 32 interrupts

39. Exceptions and Interrupts Entry Point Save State Call Handler Restore State Return to Program Exception Code HANDLER Registered Handler

40. Exceptions and Interrupts Exception library function calls support: void XExc_Init(void); Initializes vector table, default handlers void XExc_RegisterHandler (Xuint8 ExceptionId, XExceptionHandler Handler, void *DataPtr); Allows the registration of a handler void XExc_RemoveHandler (Xuint8 ExceptionId) Replaces the current handler with a default handler void XExc_mEnableExceptions (EnableMask); Enables Crit, NonCrit interrupts void XExc_mDisableExceptions (DisableMask); Disables Crit, NonCrit interrupts

41. thttpd

42. Thttpd 非常小巧的轻量级 web server 仅仅提供了 HTTP/1.1 和简单的 CGI 支持 thttpd 支持多种平台，如 FreeBSD, SunOS, Solaris, BSD, Linux, OSF 等 其资源占用小

43. Web 服务器通过调用 CGI 程序实现和 Web 浏览器的交互 CGI 程序接受 Web 浏览器发送给 Web 服务 器的信息, 进行处理, 将响应结果再回送给 Web 服务器及 Web 浏览器。 CGI 程序一般完成 Web 网页中 表单 (Form) 数据的处理、 数据库查询 实现与传统应用系统的集成等工作。

44. CGI The Common Gateway Interface The method by which a web server can get data, and display that data to users via the web A CGI can be written in any programming language (ex. C/C++, C Shell, Perl, VB)

45. CGI 接口标准包括：标准输入、环境变量、标准输出三部 分。 标准输入 CGI 程序可通过标准输入 (stdin) 从 Web 服务器得到输入信息, 如 Form 中 的数据, 这就是所谓的向 CGI 程序传递数据的 POST 方法。 环境变量 操作系统提供了许多环境变量, 应用程序可以存取它们。 Web 服务器和 CGI 接口又另外设置了自己的一些环境变量, 用来向 CGI 程序传递一些重 要的参数。 CGI 的 GET 方法还通过环境变量 QUERY-STRING 向 CGI 程 序传递 Form 中的数据。 标准输出 CGI 程序通过标准输出 (stdout) 将输出信息传送给 Web 服务器。传送给 Web 服务器的信息可以用各种格式, 通常是以纯文本或者 HTML 文本的形 式

46. How does CGI work? CGI 1. HTTP request 2. Call CGI 3. CGI program’s response 4. HTTP response User Web Browser (on client) Application (on server) Server

47. X LED Controler X-LED Controler Xled0 Xled1 Xled2 Xled3 Xled4 Xled5 Xled6 Xled7 Xled_on Xled_off input LED light number (0 ~ 7) unsigned char *paramStr; printf("Content-type: text/html\r\n"); paramStr=getenv("QUERY_STRING"); if (paramStr[0]=='x') { int seq; seq = paramStr[6]-'0'; if (seq<=7) c = 1 << seq; else if (seq ==8) c = 0xff; else c = 0x00; } else { int i = 0; c = 0x00; for(i = 7; paramStr[i] != '\0';i++) if (((paramStr[i]-'0')>=0) && ((paramStr[i]-'0')<=7)) c |= 1 << (paramStr[i]-'0'); } HTMLCGIWEB Page

48. Project: remote control Technology Hardware + OS Device driver: Led, Switch Application: CGI, HTML thttpd&cgi&html.doc Design Flow Specification: Embedded application