1. Waveguide High-Speed Circuits and Systems Laboratory B.M.Yu High-Speed Circuits and Systems Laboratory 1

2. Content 1.Overview 2.Introduction 3.Design and fabrication I.Simulation II.measurement 4.Waveguide loss measurement 5.Coupling between shallow-ridge and narrow strip 6.Conclusion High-Speed Circuits and Systems Laboratory 2

3. Overview Optics Express (2010), Low Loss Shallow-Ridge Silicon Waveguide, Po Dong Cross section of WG 3 um 2 um 0.25 um High-Speed Circuits and Systems Laboratory 3

4. Introduction Silicon photonics: interest area for broad spectrum applications (optical interconnect, sensing, RF photonics) Submicron wide deeply etched waveguide structures -Efficient and high speed active photonic devices -SOI substrates (Top silicon thickness: 0.25 um) -Lowest propagation loss (in previous reports): 1~2 dB/cm @ 1550 nm -Chip to Chip interconnect & Narrow bandwidth filters in RF photonics Shallow ridge or thin silicon waveguide -Propagation loss: 0.3~1 dB/cm (selective oxidation fabrication technique) -Difficult to control (device density, hard mask thickness, cross section of WG) In this paper -Low loss silicon ridge WG: 0.25 um silicon, average propagation loss: 0.274 dB/cm High-Speed Circuits and Systems Laboratory 4

5. Design and Fabrication -Main reason of waveguide propagation loss: light scattering from etch sidewalls  Minimizing optical field overlap with etched interface (increasing width of WG, decreasing etch depth) -Cross section of wave guide: 2 um x 0.25 um (etch depth: 0.05 um) -Power confinement: 84 % Etch sidewall of WG Shallow-ridge WG High-Speed Circuits and Systems Laboratory 5  Simulation

6. Design and Fabrication Group index: ~3.7, effective index: ~2.9 High-Speed Circuits and Systems Laboratory 6  Simulation

7. Design and Fabrication High-Speed Circuits and Systems Laboratory 7  Simulation bending loss with various bending radii

8. Design and Fabrication High-Speed Circuits and Systems Laboratory 8 SEM image of WG cross section Top-view of 64 cm waveguide -Soitec 6” wafers -0.25 um thick silicon 3um buried oxide -Spiral waveguide (r min = 300 um) -6 mm x 3 mm waveguide (length of waveguide: 64cm) 6 mm 3 mm  Fabrication

9. High-Speed Circuits and Systems Laboratory 9 Waveguide loss measurement  Test setup Optical spectrum analyzer Optical fiber (TE mode Polarization) Waveguide (horizontal taper) Optical fiber

10. Waveguide loss measurement High-Speed Circuits and Systems Laboratory 10 Insertion loss measured for different WG length as a function of wavelength  Loss measurement

11. Waveguide loss measurement High-Speed Circuits and Systems Laboratory 11  Loss measurement Waveguide propagation loss as a function of wavelength in C-band Waveguide loss with 9 chip on the same 6” SOI wafer

12. Coupling between shallow-ridge and narrow strip WG High-Speed Circuits and Systems Laboratory 12  Double level taper -Narrow strip WG (450 nm x 250 nm): 1.5 um bending radius -In Ring modulator, narrow strip WG is more efficient. -Coupling would be need Coupling between shallow-ridge and narrow strip waveguide 3-D simulation result

13. Coupling between shallow-ridge and narrow strip WG High-Speed Circuits and Systems Laboratory 13  Simulation result Coupling loss as a function of taper length -10um long taper is sufficient in order to achieve <0.25 dB coupling loss -Highly index contrast between silicon and oxide