1. ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Big Picture – Lab 2 int circ_buffer[N], circ_buffer_head = 0; int c[N]; /* coefficients */ … int ibuf, ic; for (f=0, ibuff=circ_buff_head, ic=0; ic<N; ibuff=(ibuff==N-1?0:ibuff++), ic++) f = f + c[ic]*circ_buffer[ibuf];

2. 2 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Outline for Today’s Lecture  Administrative, Lab2, Feedback on Lab1  Embedded CPUs  Interrupts  IO  Embedded System Software Design  Basics on Image Manipulation

3. 3 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Readings  Chapters 2, 3 CPUs, Interrupts  Chapter 4, emphasizing 4.1 through 4.7 I/O, USB, debugging  Chapter 5, emphasizing 5.1-5.4, 5.9 Programming, patterns, test …  Basics on Image manipulation http://student.kuleuven.be/~m0216922/CG/filtering.html

4. 4 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Objectives of Lab 2  Sense the external world through a camera  Transfer the camera data to the DE2 board  Process the image in software on the NIOS  View the images on the monitor  Concepts: I/O (camera, monitor, interrupts) Basic image processing Embedded software design and test running on an embedded processor

5. 5 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Outline for Today’s Lecture  Administrative, Lab2, Feedback on Lab1  Embedded CPUs  Interrupts  IO  Embedded System Software Design  Basics on Image Manipulation

6. 6 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Superscalar  RISC pipeline executes one instruction per clock cycle (usually). For example, ARM, MIPS, PowerPC, etc  Superscalar machines execute multiple instructions per clock cycle. Faster execution. More variability in execution times. More expensive CPU. Requires a lot of hardware. n 2 instruction unit hardware for n-instruction parallelism. For example, Intel X86

7. 7 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Order of execution  In-order: Machine stops issuing instructions when the next instruction can’t be dispatched.  Out-of-order: Machine will change order of instructions to keep dispatching. Substantially faster but also more complex. Can be still in-order completion avoid issues with precise exceptions etc

8. 8 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 VLIW architectures  Very long instruction word (VLIW) processing provides significant parallelism.  Rely on compilers to identify parallelism.  VLIW requires considerably more sophisticated compiler technology than traditional architectures---must be able to extract parallelism to keep the instructions full.  VLIW is popular for various embedded designs EPIC = Explicitly parallel instruction computing. Used in Intel/HP Merced (IA-64) machine.

9. 9 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Difference between microcontrollers, microprocessors and FPGA systems  FPGA systems often contain CPUs in softcore (synthesized) or hardcore (part of die) format but can also contain logic blocks for other hardware, e.g., state machines, etc Recent 65 nm FPGAs (Virtex 5) can achieve high performance. Key issues?  Microcontrollers are more limited in functionality and often do not include support for virtual memory and caches Up to 50MHz  Microprocessors are more performance capable and have typically virtual memory support From 50MHz to GHz Tx Rx DiscretePHYDiscretePHY Tx Rx Soft core Hard core with built- in Transceivers

10. 10 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Another perspective: PLDs, FPGAs, ASICs, Structured ASICs  Programmable logic devices (PLDs) provide low/medium density logic.  Field-programmable gate arrays (FPGAs) provide more logic and multi-level logic.  Application-specific integrated circuits (ASICs) are manufactured for a single purpose.  Structured ASICs are inbetween FPGAs and ASIC

11. 11 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Memory system  CPU fetches data, instructions from a memory hierarchy: Main memory L2 cache L1 cache CPU  Some systems also include TLB to provide a cache during address translation DRAM/Flash SRAM

12. 12 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Memory hierarchy complications  Program behavior is much more state- dependent. E.g., depends on how earlier execution left the cache.  Execution time is less predictable. Memory access times can vary by 100X. Virtual memory, TLB, etc all affect performance

13. 13 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Types of memory  ROM: Mask-programmable. High density – downside? Flash programmable. Challenges? Advantages? # of erase cycles  RAM: DRAM. Access time? SRAM. Access time? What kinds of memory do we use in Lab 1? In Lab 2? Why?

14. 14 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Memory device organization n r c w n address lines w data lines Word-line Bit-line Memory cell Memory array

15. 15 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Cache Organization Matchline CAM Tags Data SRAM Cache Bank 32 lines 8 words 16 Banks Tag Bank Word Byte 31 9 8 5 4 2 1 0 Virtual Address: MUX Data

16. 16 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Virtual Memory Organization Example

17. 17 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 In Embedded Designs MMU Can Look Much Simpler

18. 18 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 But Also Fairly Complicated

19. 19 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Programming model in Processors  Assembly language One-to-one with machine instructions (more or less). Labels provide names for addresses (usually in first column). Pseudo-ops: constants, define storage, define address  Programming model: registers visible to the programmer. For example ARM has 32 registers Some registers are not visibible: system registers

20. 20 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 ARM assembly language example label1ADR r4,c LDR r0,[r4] ; a comment ADR r4,d LDR r1,[r4] SUB r0,r0,r1 ; comment

21. 21 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Visualizing  Control Flow Graphs  Procedures  Loops  Basic Blocks  Instructions Copyright BlueRISC 2007

22. 22 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Outline for Today’s Lecture  Administrative, Lab2, Feedback on Lab1  Embedded CPUs  Interrupts  IO  Embedded System Software Design  Basics on Image Manipulation

23. 23 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Interrupt interface CPU status reg data reg mechanism PC intr request intr ack data/address IR

24. 24 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Prioritized interrupts CPU device 1device 2device n L1 L2.. Ln interrupt acknowledge  Masking: interrupt with priority lower than current priority is not recognized until pending interrupt is complete.  Non-maskable interrupt (NMI): highest-priority, never masked. Often used for power-down.

25. 25 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Example: Prioritized I/O :interrupts:foreground:A:A:B:B:C:C B A,B C A

26. 26 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Generic interrupt mechanism intr? N Y Assume priority selection is handled before this point. N ignore Y ack vector? Y Y N timeout? Y bus error call table[vector] intr priority > current priority? continue execution

27. 27 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Interrupt vectors  Allow different devices to be handled by different code.  Interrupt vector table: handler 0 handler 1 handler 2 handler 3 Interrupt vector table head

28. 28 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Sources of interrupt overhead  Handler execution time.  Interrupt mechanism overhead.  Register save/restore.  Pipeline-related penalties.  Cache-related penalties.

29. 29 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 ARM interrupts  ARM7 supports two types of interrupts: Fast interrupt requests (FIQs). Interrupt requests (IRQs).  Interrupt table starts at location 0.

30. 30 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Exception and Trap  Exception: internally detected error. Exceptions are synchronous with instructions but unpredictable. Build exception mechanism on top of interrupt mechanism.  Trap (software interrupt): an exception generated by an instruction. Call supervisor mode. ARM uses SWI instruction for traps.

31. 31 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Outline for Today’s Lecture  Administrative, Lab2, Feedback on Lab1  Embedded CPUs  Interrupts  IO  Embedded System Software Design  Basics on Image Manipulation

32. 32 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 I/O devices  I/O devices: serial links (UART, USB, SPI, RS-232, RS-485, I2C, S2C, high-speed such as PCIe…) timers and counters keyboards displays analog I/O

33. 33 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Application: 8251 UART  Universal asynchronous receiver transmitter (UART) : provides serial communication.  8251 functions are integrated into standard PC interface chip. 8255 used to a be a parallel interface  Allows many communication parameters to be programmed.

34. 34 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Serial communication  Characters are transmitted separately: time bit 0bit 1bit n-1 no char start stop...

35. 35 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Serial communication parameters  Baud (bit) rate.  Number of bits per character.  Parity/no parity.  Even/odd parity.  Length of stop bit (1, 1.5, 2 bits).

36. 36 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 8251 CPU interface CPU 8251 status (8 bit) data (8 bit) serial port xmit/ rcv

37. 37 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Programming I/O  Two types of instructions can support I/O: special-purpose I/O instructions; memory-mapped load/store instructions.  Intel x86 provides in, out instructions. Most other CPUs use memory-mapped I/O.  I/O instructions do not preclude memory- mapped I/O.

38. 38 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 USB 2.0  Goals: Easy to use. Low cost for consumer devices. Up to 480 Mb/s in 2.0. A Low Speed (1.1, 2.0) rate of 1.5 Mbit/s (187 kB/s) that is mostly used for Human Interface Devices (HID) such as keyboards, mice, and joysticks.Mbit/skB A Full Speed (1.1, 2.0) rate of 12 Mbit/s (1.5 MB/s). Full Speed devices divide the USB bandwidth between them in a first-come first-served basis and it is not uncommon to run out of bandwidth with several isochronous devices. All USB Hubs support Full Speed.MBisochronous A Hi-Speed (2.0) rate of 480 Mbit/s (60 MB/s). Experimental data rate:data rate A Super-Speed (3.0) rate of 4.8 Gbit/s (600 MB/s).

39. 39 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 USB bus protocol  Polled bus, all transfers initiated by host.  Basic transaction: Host sends token packet: Type and direction. USB device number. Endpoint number (subdevice). Data transfer packet. Acknowledge packet.  Differential signaling: Vdd+, Vdd-, Data+, Data-

40. 40 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 PCIe Architecture X8 End Point Point X4 End Point Point X2 End Point Point PCIBridgePCIBridge SWITCHSWITCH CPUCPU ROOT COMPLEX SWITCHSWITCH SWITCHSWITCH X1 End Point Point PCIPCI PCI Express Graphics : 16X PCI Express Graphics : 16X - PCIe Link MemoryMemory Not a bus but point to point Full duplex Communication 1-32 lanes each 32MB/s

41. 41 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Outline for Today’s Lecture  Administrative, Lab2, Feedback on Lab1  Embedded CPUs  Interrupts  IO  Embedded System Software Design  Basics on Image Manipulation

42. 42 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Software components  Need to break the design up into pieces to be able to write the code.  Some component designs come up often. A design pattern is a generic description of a component that can be customized and used in different circumstances.  Firmware – basic system software for a chip  Device driver – control of hardware modules in a system tightly coupled with operating systems

43. 43 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Building Code Image HLL compile assembly assemble HLL source assembly link executable load

44. 44 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Assemblers  Major tasks: generate binary for symbolic instructions; translate labels into addresses; handle pseudo-ops (data, etc.).

45. 45 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Linking  Combines several object modules into a single executable module.  Jobs: put modules in order; resolve labels across modules.

46. 46 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Dynamic linking  Some operating systems link modules dynamically at run time: shares one copy of library among all executing programs; allows programs to be updated with new versions of libraries.

47. 47 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Embedded system design often includes software state machines  State machine keeps internal state as a variable, changes state based on inputs. AB C D in1=1/x=a in1=0/x=b r=0/out2=1 r=1/out1=0 s=1/out1=1 s=0/out1=0

48. 48 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 C state table switch (state) { case A: if (in1==1) { x = a; state = B; } else { x = b; state = D; } break; case B: if (r==0) { out2 = 1; state = B; } else { out1 = 0; state = C; } break; case C: if (s==0) { out1 = 0; state = C; } else { out1 = 1; state = D; } break;

49. 49 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 How to build/debug? Host-target design, debugging  Use a host system to prepare software for target Cross compiler: compiles code on host for target system.  Cross debugger: displays target state, allows target to be controlled.  Optimizing for execution time, energy/power, program size. target system host system serial line

50. 50 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 In-circuit emulators  A microprocessor in-circuit emulator is a specially-instrumented microprocessor.  Allows you to stop execution, examine CPU state, modify registers.  Many microprocessors also support software debugging through special ports and (typically) Jtag interface

51. 51 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Outline for Today’s Lecture  Administrative, Lab2, Feedback on Lab1  Embedded CPUs  Interrupts  IO  Embedded System Software Design  Basics on Image Manipulation

52. 52 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Images  A picture is a rectangular array of pixels (=picture element)  A digital picture is a picture stored in binary (bits). The picture resides in a digital storage system as a file.

53. 53 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Pixels, Grey Values and Quantization  Conceptually, a monochrome (black and white) image is a function f(x, y), sampled over a two-dimensional grid. Each sample value is called a pixel (picture element).  Conceptually, the function is real-valued and has a continuous range. This is called the grey value of the pixel. On a computer, it is represented with a finite number of bits. This is called quantization.

54. 54 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Example Raw picture format, 256x256, 1 byte per pixel 123...256 257258259...512 513514515...768... 65,28065,281... 65,536 Pixel sequence in file

55. 55 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Calculations  In the so-called raw format, the file contains only the gray values of the pixels.  Bits/picture = Rows x Columns x bits/pixel  Bytes/picture = Rows x Columns x bytes/pixel  Example: For the previous slide, 256 rows, 256 columns, 1 byte per pixel. Bytes = 256x256x1 = 65536

56. 56 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Pixels, Quantization, and Quality  A given picture can be represented with different numbers of pixels and various numbers of bits per pixel. Fewer pixels produces lower quality Fewer bits per pixel produces lower quality  There is a tradeoff between quality and picture storage requirements.

57. 57 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Examples of quantization vs. resolution 64x64, 8 bit, 4 kB Lower resolution 256x256, 1 bit, 8 kB256x256, 4 bit, 32 kB256x256, 8 bit, 64 kB256x256, 2 bit, 16 kB

58. 58 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Some Image Processing functions  Add timestamp onto image  Counter to keep track of number of pictures taken  Rotate, mirror, invert image  Simple edge detection (hard)  Detect motion in images (harder)  Detect illegal behavior in images (computer vision)

59. 59 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Uses of Digital Pictures  Consumer and Commercial Photography  Web-cam  Medical Imaging X-ray Tomography Ultrasound  Video DVD Broadcast Surveillance What quality levels are required for each? Storage requirements?

60. 60 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Why Standard Formats?  Interoperability Image made by Nikon, viewed on computer made by Apple.  Advantages of standards Competition among vendors (lower prices) Creation of markets Multiple vendors - product cycle safety

61. 61 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Image Coding (Compression)  Why compress? Store more pictures in same memory Spend less time sending picture over web  Lossless compression (LZ, Huffman, RLE): Decompress file and get the same picture, bit - for - bit  Lossy compression (JPEG,…): Decompress and get something similar. Any amount of compression is possible. Tradeoff between image quality and compression.

62. 62 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Example of JPEG compression Very high quality: compression = 2.33 Photoshop Image Very low quality: compression = 115 Produced by MATLAB with Quality = 0

63. 63 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 What’s Next ?  Lab 2 details by TA.

64. 64 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 BACKUP

65. 65 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Design patterns  Design pattern: generalized description of the design of a certain type of program.  Designer fills in details to customize the pattern to a particular programming problem.  Useful in both C and Verilog! Patterns are close but not the same in C and Verilog

66. 66 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 State machine pattern State machine state output step(input)

67. 67 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 C implementation #define IDLE 0 #define SEATED 1 #define BELTED 2 #define BUZZER 3 switch (state) { case IDLE: if (seat) { state = SEATED; timer_on = TRUE; } break; case SEATED: if (belt) state = BELTED; else if (timer) state = BUZZER; break; … }

68. 68 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Circular buffer x1x2x3x4x5x6 t1t1 t2t2 t3t3 Data stream x1x2x3x4 Circular buffer x5x6x7

69. 69 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Circular buffer pattern Circular buffer init() add(data) data head() data element(index)

70. 70 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Circular buffer implementation: FIR filter int circ_buffer[N], circ_buffer_head = 0; int c[N]; /* coefficients */ … int ibuf, ic; for (f=0, ibuff=circ_buff_head, ic=0; ic<N; ibuff=(ibuff==N-1?0:ibuff++), ic++) f = f + c[ic]*circ_buffer[ibuf];

71. 71 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Example: FIR filter  Code: for (firout = 0.0, j =0; j < N; j++) firout += buff[j] * c[j]; if (firout > 100.0) firout = 100.0; if (firout < -100.0) firout = -100.0;  Controllability: to test range checks for firout, must first load circular buffer.  Observability: how do we observe values of buff, firout?

72. 72 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Patterns for digital images?  For Lab 3, It is required that you implement two forms of image processing  Recommendations include: Add timestamp onto image Counter to keep track of number of pictures taken Rotate, mirror, invert image Simple edge detection (challenging) Detect changes in images (challenging) Pattern for image processing http://www.student.kuleuven.ac.be/~m0216922/CG/filtering.html#Find_Edges_

73. 73 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Circular buffers  Indexes locate currently used data, current input data: d1 d2 d3 d4 time t1 use input d5 d2 d3 d4 time t1+1 use input

74. 74 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 C circular buffer To compute FIR filter value f: for (f=0, ic=0, ibuff = circ_buff_head; ic < N; ibuff = (ibuff = N-1 ? 0 : ibuff++) ) f = f + c[ic] * circ_buff[ibuff]

75. 75 ECE 354 © Moritz 2009, some slides modified from Moritz/Koren/Burleson, UMass and Wolf, Computers as Components, Morgan Kaufman, 2005 Program design and analysis  Program validation and testing.  Make sure software works as intended. We will concentrate on functional testing---performance testing is harder.  What tests are required to adequately test the program? What is “adequate”?