1. System Resources

2. System Resources
System Resources are the communications channels, addresses, and other signals used by hardware devices to communicate on the Bus.
At their lowest level, these resources typically include the following:
DMA (Direct Memory Access) channels
I/O Port Addresses
IRQ (Interrupt Request) channels
Memory Addresses

3. Memory Addresses
Each memory location has its own distinct address. Additionally the memory locations are divided into eight different sections.
Conventional (base) memory ( – 09FFFF) 640kB
Upper memory area (UMA) (0A0000 – 0FFFFF) 384kB
High memory area (HMA) ( – 1FFFEF) 64kB-16B
Extended memory (XMS) ( – FFFFFFFFF) GB-1MB
Expanded memory (obsolete)
Video RAM memory (part of UMA) (0A0000 – 0BFFFF) 128kB
Adapter ROM and special purpose RAM (part of UMA) (0C0000 – 0DFFFF) 128kB
Motherboard ROM BIOS (part of UMA) (0E0000 – 0FFFFF) kB

4. IRQs (Interrupt Requests)
Interrupt request channels, or hardware interrupts, are used by various hardware devices to signal the motherboard that a request must be fulfilled. This procedure is the same as a student raising their hand to indicate that they need attention.
When a particular interrupt is invoked, a special routine takes over the system, which first saves all the CPU register contents in a stack and then directs the system to the interrupt vector table. This vector table contains a list of memory addresses that correspond to the interrupt channels.
The pointers in the vector table point to the address of whatever software driver is used to service the card that generated the interrupt.

5. IRQs (Interrupt Requests)
After the particular software routine finishes performing whatever function the card needed, the interrupt control software returns the stack contents to the CPU registers, and the system then resumes whatever it was doing before the interrupt occurred.
Hardware interrupts are generally prioritized by their numbers; with some exceptions, the highest priority interrupts have the lowest numbers.
The original PC and XT interrupt controller chip could handle eight IRQ’s at once. The AT motherboard (by daisy chaining two chips) can handle 15 IRQ’s at once. There are 16 IRQ lines.
AT controllers began using interrupts 9-15, leaving the XT controllers the 0-8 lines. Because of this, the old IRQ 2 is often borrowed by the new IRQ 9 using something called “cascading”

6. VL-Bus slots
ISA

7. PCI slots
A 32-bit, 33MHz PCI slot (left) compared to a 64-bit 33MHz PCI slot (center) and a 64-bit universal PCI slot that runs at 66MHz (right).

8. PCI Bus Types
ISA

9. AGP Modes Showing Clock Speeds and Bandwidth
ISA

10. System Resources
System resources are the communications channels, addresses, and other signals used by hardware devices to communicate on the bus.
At their lowest level, these resources typically include the following:
Memory addresses
IRQ (interrupt request) channels
DMA (direct memory access) channels
I/O port addresses

11. 8-Bit ISA Bus Default Interrupt Assignments

12. Interrupt controller cascade wiring

13. 16/32-Bit ISA/PCI/AGP Default Interrupt Assignments

14. PCI Interrupts
The PCI bus supports hardware interrupts (IRQs) that can be used by PCI devices to signal to the bus that they need attention.
The four PCI interrupts are called INTA#, INTB#, INTC#, and INTD#.
These INTx# interrupts are level-sensitive, which means that the electrical signaling enables them to be shared among PCI cards.
In fact, all single device or single function PCI chips or cards that use only one interrupt must use INTA#. This is one of the rules in the PCI specification.
If additional devices are within a chip or onboard a card, the additional devices can use INTB# through INTD#.
Because there are very few multifunction PCI chips or boards, practically all the devices on a given PCI bus will be sharing INTA#.

15. PCI Interrupts
For the PCI bus to function in a PC, the PCI interrupts must be mapped to ISA interrupts.
Because ISA interrupts cannot be shared, in most cases each PCI card using INTA# on the PCI bus must be mapped to a different nonshareable ISA interrupt.
For example, you could have a system with four PCI slots and four PCI cards installed, each using PCI interrupt INTA#.
These cards would be each mapped to a different available ISA interrupt request, such as IRQ9, IRQ10, IRQ11, or IRQ5 in most cases.

16. Sharing Interrupts on PCI
Newer system BIOS as well as plug-and-play operating systems, such as Windows 95B (OSR- 2) or later, Windows 98, and Windows 2000, all support a function known as PCI IRQ Steering.
For this to work, both your system BIOS and operating system must support IRQ Steering.
Older system BIOS and Windows 95 or 95A do not have support for PCI IRQ Steering.

17. Sharing Interrupts on PCI
Generally, the BIOS assigns unique IRQs to PCI devices.
If your system supports PCI IRQ Steering and it is enabled, Windows assigns IRQs to PCI devices.
Even when IRQ Steering is enabled, the BIOS still initially assigns IRQs to PCI devices. Although Windows has the capability to change these settings, it generally does not do so automatically, except where necessary to eliminate conflicts.
If there are insufficient free IRQs to go around, IRQ Steering allows Windows to assign multiple PCI devices to a single IRQ, thus enabling all the devices in the system to function properly.
Without IRQ Steering, Windows begins to disable devices after it runs out of free IRQs to assign.

18. PCI IRQ Steering
The solution to the fewer interrupts problem is interrupts sharing.
PCI IRQ Steering allows a plug-and-play operating system such as Windows to dynamically map or “steer” PCI cards (which almost all use PCI INTA#) to standard PC interrupts and allows several PCI cards to be mapped to the same interrupt.

19. PCI IRQ Steering
To determine whether your system is using IRQ Steering, you can follow these steps:
1. Right Click My Computer, and choose Properties.
2. Click the Device Manager tab.
3. Double-click the System Devices branch.
4. Double-click PCI Bus, and then click the IRQ Steering tab. There will be a check that displays IRQ Steering as either Enabled or Disabled. If enabled, it also specifies where the IRQ table has been read from.

20. PCI IRQ Steering

21. 8-Bit ISA Default DMA-Channel Assignments

22. 16-Bit ISA Default DMA-Channel Assignments

23. DMA (direct memory access)
Direct Memory Access (DMA) channels are used by high speed communications devices that must send and receive information at high speed.
A serial or parallel port does not use a DMA channel, but a sound card or SCSI adapter often does.
DMA peripheral chips are limited in number and can only allocate one channel to one device however, DMA channels sometimes can be shared if the devices are not the type that would need them simultaneously.

24. DMA (direct memory access)
CPU’s can calculate much faster than applications can handle results, and can be loaded down if it were to send data about storing something on a hard drive and then had to wait around for the very slow hard drive to report back.
This movement of data from slow disk to fast memory ordinarily would need to pass through some very small memory registers in the CPU.
DMA bypasses the CPU registers and moves information directly into and out of RAM ( thus direct memory)

25. I/O Port Addresses

26. I/O Port Addresses

27. I/O Port Addresses

28. I/O Port Addresses

29. I/O Port Addresses

30. I/O Port Addresses

31. I/O Port Address
Your computer’s I/O ports enable communications between devices and software in your system. They are equivalent to two-way radio channels.
If you want to talk to your serial port, you need to know on which I/O port it is listening. Similarly, if you want to receive data from the serial port, you need to listen on the same channel.
There are 65,535 ports, numbered from 0000 h to FFFF h

32. I/O Port Address
One confusing issue is that I/O ports are designated by hexadecimal addresses similar to memory addresses. The difference is that when you send data to memory address 1000 h, it gets stored in your DIMM. If you send data to I/O port address 1000 h, it gets sent out on the bus on that “channel,” and anybody listening in would then hear it. If nobody was listening to that port address, the data would reach the end of the bus and be absorbed by the bus terminating resistors.
Virtually all devices on your system buses use I/O port addresses. Most of these are fairly standardized.

33. System Resource Map

34. System Resource Map

35. System Resource Map

38. Network Interface Card (NIC)
Requires an IRQ and a range of I/O port addresses.
Might need a 16KB range of upper memory.
Multiple-COM Port Adapters

39. Plug-and-Play Systems
For PnP to work, the following components are desired:
PnP hardware
PnP BIOS
PnP operating system