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1 ECE 587 Advanced Computer Architecture I Chapter 1 Instructor and You Herbert G. Mayer, PSU Status 7/1/2015.

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Presentation on theme: "1 ECE 587 Advanced Computer Architecture I Chapter 1 Instructor and You Herbert G. Mayer, PSU Status 7/1/2015."— Presentation transcript:

1 1 ECE 587 Advanced Computer Architecture I Chapter 1 Instructor and You Herbert G. Mayer, PSU Status 7/1/2015

2 2 Syllabus Your Instructor Your Instructor The First Week The First Week Goals of ECE 587 Goals of ECE 587 Extra Credit Extra Credit Who Are You? Who Are You? Expected Background Expected Background Structure of ECE 587 Structure of ECE 587 Read Handout 1 Read Handout 1

3 3 Your Instructor – Absent at the Moment Dr. Alameldeen is generally the PSU professor to teach this course Dr. Alameldeen is generally the PSU professor to teach this course He’ll make his own introduction He’ll make his own introduction

4 4 Your Instructor – Absent at the Moment Instructor Herb Mayer is a German immigrant to the USA, who worked in the US computer industry and academia Instructor Herb Mayer is a German immigrant to the USA, who worked in the US computer industry and academia Moved to the US, from home-town Berlin, due to marriage with lovely US citizen in Berlin Moved to the US, from home-town Berlin, due to marriage with lovely US citizen in Berlin Became naturalized US citizen in 1995 Became naturalized US citizen in 1995 MS EECS (electrical engineering and computer science) UCSD 1983; beautiful beach & campus! MS EECS (electrical engineering and computer science) UCSD 1983; beautiful beach & campus! PhD CS (“Informatik”, equivalent to “Computer Science”) TU Berlin 1995; awesome city, now united! Dissertation published as book at Springer Verlag © 1996, ISBN 3-486-24076-5 PhD CS (“Informatik”, equivalent to “Computer Science”) TU Berlin 1995; awesome city, now united! Dissertation published as book at Springer Verlag © 1996, ISBN 3-486-24076-5 Professional focus at Intel on compiler optimization, HW validation, alias analysis, programming languages, VLIW, multiprocessing Professional focus at Intel on compiler optimization, HW validation, alias analysis, programming languages, VLIW, multiprocessing

5 5 Your Instructor PhD Thesis on aggressive but correct generation of MP-object code via alias analysis of source PhD Thesis on aggressive but correct generation of MP-object code via alias analysis of source Retired in 2011 after 24 years at Intel Corp. There: Retired in 2011 after 24 years at Intel Corp. There: Managed implementation of Intel Compilers for systolic array architecture 1980s Managed Intel CPU tuning labs 1990 Managed Intel CPU validation in 2000s for new Intel processors Teaching computer science since 1987 at PSU Teaching computer science since 1987 at PSU Teaching experience 2004 in Shanghai’s IIIST, and 2014-2015 at CCUT, Manchuria, also PRC Teaching experience 2004 in Shanghai’s IIIST, and 2014-2015 at CCUT, Manchuria, also PRC Loved China and teaching in China, hence decided to participate in CCUT + PSU cooperation Loved China and teaching in China, hence decided to participate in CCUT + PSU cooperation Committed to CCUT in academic year 2016 as well, just this summer locally at PSU Committed to CCUT in academic year 2016 as well, just this summer locally at PSU

6 6 The First Week During week 1, Dr. Mayer is on the way back from teaching CS at CCUT in Changchun, China During week 1, Dr. Mayer is on the way back from teaching CS at CCUT in Changchun, China This first lecture (Tuesday June 23 rd 2015) is graciously conducted by Dr. Alaa A. Alameldeen, research scientist at Intel This first lecture (Tuesday June 23 rd 2015) is graciously conducted by Dr. Alaa A. Alameldeen, research scientist at Intel Dr. Alameldeen is creator and owner of intellectual property used in ECE 587, as taught at PSU for years Dr. Alameldeen is creator and owner of intellectual property used in ECE 587, as taught at PSU for years Another source of information used this term is derived from my “Advanced Computer Architecture” lectures in the CS department Another source of information used this term is derived from my “Advanced Computer Architecture” lectures in the CS department Thursday of week one (June 25 th 2015) we have no class Thursday of week one (June 25 th 2015) we have no class We shall extend class time in the remaining 7 weeks by about 10 minutes to recover lost time We shall extend class time in the remaining 7 weeks by about 10 minutes to recover lost time

7 7 The First Week In this first week you still have to do your reading assignment In this first week you still have to do your reading assignment And you begin your very simple HW 1, to be used as input generator for both simulators: Cache Simulator and a VMM Simulator And you begin your very simple HW 1, to be used as input generator for both simulators: Cache Simulator and a VMM Simulator Output of HW 1 is a string of memory accesses for a small matrix multiply Output of HW 1 is a string of memory accesses for a small matrix multiply Due date for HW 1 is listed on your Handout # 1 Due date for HW 1 is listed on your Handout # 1 All scheduled work is due at the start of class on the due date All scheduled work is due at the start of class on the due date

8 8 Goals of ECE 587 ECE 587 is a course in advanced computer system architecture and design ECE 587 is a course in advanced computer system architecture and design Key topics include advanced CPU design, including techniques rto exploit parallelism, pipelining, dynamic instruction issue, superscalar architectures, vector processing Key topics include advanced CPU design, including techniques rto exploit parallelism, pipelining, dynamic instruction issue, superscalar architectures, vector processing And we discuss esoteric architectures such as Systolic Arrays And we discuss esoteric architectures such as Systolic Arrays We discuss high-performance processor execution, memory and IO systems design We discuss high-performance processor execution, memory and IO systems design Introduce engineering issues with parallel computer architectures Introduce engineering issues with parallel computer architectures Survey current literature in computer architecture and of current advanced computer systems Survey current literature in computer architecture and of current advanced computer systems

9 9 Extra Credit Extra Credit: is a way to improve your grade by up to a half grade, i.e. up to a maximum of 50 points Extra Credit is granted for good ideas expressed in class, constructive questions and contributions in class, identifying errors in class material Volunteers may present their HW 1 solution, or select topics in class, 10 min. each for a few extra credit points Any error in class material, even the slightest typo – but only pointed out the first time– is worth some extra credit Presenting smart homework solutions in class can deserves extra credit; you need to volunteer for such presentations proactively

10 10 Who are You? Briefly, 2-6 students volunteer to articulate in class, explaining: Your name Your field of study, major, and current progress Why do you take ECE 587 What is your expectation of this class? What is your minimal goal for this class? Which is your ideal learning goal? Have you worked in the computer industry? Which computer subjects are you interested in? Anything else relevant to this course

11 11 Expected Background Know how to program in C or C++ Understand Computer architecture elements Basic CPU operation, microprocessor or other RISC, CISC, GPR architecture Data cache and instruction cache Some branch prediction, and why necessary for pipelined architecture

12 12 Structure of ECE 587 First 4 to 5 weeks only lectures First 4 to 5 weeks only lectures Every week from week 2 to week 7 you are assigned to read several computer architecture papers Every week from week 2 to week 7 you are assigned to read several computer architecture papers Last 3 or 4 weeks students also present summaries and assessments of key architecture papers; some literature may be quite old, yet still very valid Last 3 or 4 weeks students also present summaries and assessments of key architecture papers; some literature may be quite old, yet still very valid Presentation via PowerPoint –or equivalent Presentation via PowerPoint –or equivalent Cache Simulator Project: Students implement a very simple data cache simulator Cache Simulator Project: Students implement a very simple data cache simulator VMM Simulator Project: Students implement simplified virtual memory simulator for a small (32- bit) architecture VMM Simulator Project: Students implement simplified virtual memory simulator for a small (32- bit) architecture Both simulators read memory access streams, generated by the load/store pattern of a matrix multiply app: your HW 1 Both simulators read memory access streams, generated by the load/store pattern of a matrix multiply app: your HW 1

13 13 Read Handout 1 Summer terms are short Summer terms are short Plus we lose 1 lecture in week 1 So start reading early Follow the schedule of papers to be read And read the on-line information, specifically handout 1 in week 1, and work on homework 1 in week 1 OK to communicate with me, Herb via email from day 1, even though I am in China –or on the road


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