1. 1 Programmer’s View of the EAGLE 2 16 -1 70 15 0 R0 R1 R7 Register file IR PC CPU 0 1 2 :::::: Main memory :

2. 2 EAGLE : Notation [R3] means contents of register R3 M[8] means contents of memory location 8 A memory word at address 8 is defined as the 16 bits at address 9 and 8

3. 3 EAGLE : Notation Special notation for 16-bit memory words M[8] := M[9] © M[8] © is used to represent concatenation M[8] M[9] 07 0 MS Byte 7815 M[9] M[8] LS Byte One instruction 0 1  Memory addresses

4. 4 EAGLE: instruction formats opcode 7 3 ra 0 Type Y Type W opcode 8 15 constant 0 15 1110 8 constant 70 Type V opcode ra 76 5 3 rb 20 Type X opcode ra rb opcode Type Z 0 7 2

5. 5 Encoding for the GPRs to be used in place of ra or rb. RegisterCodeRegisterCode R0000R4100 R1001R5101 R2010R6110 R3011R7111

6. 6 Type Z  four instructions  halt (op-code=250)  nop (op-code = 249)  init (op-code = 251)  reset (op-code = 248) opcode 0 7

7. 7  add (op-code = 11) add r1R[0] R[1] + R[0]  and(op-code = 19) and r5R[0] R[1] & R[0]  div(op-code = 16) div r6 R[0] R[0] / R[6] R[6] R[0] % R[6]  mul (op-code = 15) mul r4R[0] R[0] * R[4] Type Y opcode 7 3 ra 0

8. 8  not(op-code = 23) not r6R[6] !R[6]  or (op-code=21) or r5R[0] R[0] ~ R[5]  sub (op-code=12) sub r7R[0] R[0] – R[7] opcode 7 3 ra 0 Type Y

9. 9 Type X  mov (op-code = 0) mov r5, r1 R[5] R[1] useful for register transfers 76 ra 5 3 rb 20 Type x opcode ra rb

10. 10 Type W  br (op-code = 252) br 14 PC PC+14 Unconditional jump opcode 8 15 constant 0

11. 11 Type V  addi (op-code = 13) addi r4, 31 R[4] R[4] +31  andi (op-code = 20 ) andi r6, 1 R[6] R[6] &1  in (op-code=29) in r1, 45 R[1] IO[45]  load (op-code=8) load r3, 6 R[3] M[6] 15 1110 8 constant 70 opcode ra

12. 12 Type V  brn (op-code = 28) brn r4, 3 if R[4] < 0, PC PC + 3  brnz (op-code = 25 ) brnz r6, 12 if R[6] != 0, PC PC + 12  brp(op-code=27) brp r1, 45 if R[1] > 0, PC PC + 45  brz (op-code=8) brz r5, 8 if R[5] = 0, PC PC + 8 15 1110 8 constant 70 opcode ra

13. 13 Type V  loadi (op-code=9) loadi r5, 54R[5] 54  ori (op-code=22) ori r7, 11R[7] 11 ~ R[7]  out (op-code=30) out 32, r5IO[32] R[5] 15 1110 8 constant 70 opcode ra

14. 14 Type V  shiftl (op-code=17)  shiftr( op-code=18)  store (op-code=10)  subi (op-code=14) 15 1110 8 constant 70 opcode ra

15. 15 Functional Groups of Instructions Control InstructionMnemonicopcode Resetreset11111000 No operationnop11111001 Halthalt11111010 Initinit11111011

16. 16 Functional Groups of Instructions Data Transfer Instruction mnemonicopcode Inputin11101 Outputout11110 Movemov00 Load from memoryload01000 Load constantloadi01001 Store into memorystore01010

17. 17 Functional Groups of Instructions Branch instruction mnemonicopcode Branch if negativebrn11100 Branch if not zerobrnz11001 Branch if zerobrz11010 Branch if positivebrp11011 Branchbr11111100

18. 18 Functional Groups of Instructions Arithmetic instruction mnemonicopcode Addadd01011 Add immediateaddi01101 Subtractsub01100 Subtract immediatesubi01110 Dividediv10000 Multiplymul01111

19. 19 Functional Groups of Instructions Logic Instructionmnemonicopcode Andand10011 And immediateandi10100 Oror10101 Or immediateori10110 Notnot10111 Shift leftshiftl10001 Shift rightshiftr10010

20. 20 Modified EAGLE One 16-bit accumulator: ACC 8 GPRs: R0, R1, …, R7; 16-bits each Two 16-bit system registers transparent to the programmer: PC, IR Memory word size: 16 bits Memory space size: 2 16 bytes Memory organization: 2 16 x 8 bits Memory accessed in 16 bit words ( i.e., 2 byte chunks) Little-endian byte storage

21. 21 Modified EAGLE Instruction Formats Type W 15 1110 8 constant 70 opcode unused Type Y Type Z 15 1110 8 constant 70 Type X opcode ra opcode unused 0 2 3 7 opcode ra 0 2 3 7