1. David MalaspinaFIELDS I-PDR – DFB Solar Probe Plus FIELDS Instrument PDR Digital Fields Board David Malaspina CU/LASP David.Malaspina@lasp.colorado.edu 1

2. David MalaspinaFIELDS I-PDR – DFB DFB Agenda 2 Science Objectives Performance and Driving Requirements DFB Block Diagram Electrical Diagram / Layout Interfaces DFB Processing Development Status Resources Backup Information –L3 Requirements –Data Product Details –Heritage –QA, Parts, Materials, Safety –BOM –Schedule –Risks –Action Items

3. David MalaspinaFIELDS I-PDR – DFB DFB High-Level Tasks The Digital Fields Board on Solar Probe Plus: 1) Accepts signals from 5 electric field sensors, 4 search coil magnetic field sensors 2) Performs analog processing, digitization, and digital processing of: Voltage signals (antenna-to-spacecraft ground) DC-coupled, AC-coupled Electric field signals (antenna-to-antenna) DC-coupled (High-gain, Low-gain), AC-coupled Magnetic field signals (> 10 Hz) Low-frequency coil signals (High-gain and Low-gain) Medium-frequency coil signals 3) Generates time domain and spectral domain data products, transmit them to the digital control board (DCB) 4) Provides calibration signals for search coil magnetometer 3

4. David MalaspinaFIELDS I-PDR – DFB 4 Electric Field Science Drivers Electric Fields of Scientific Interest + DFB Frequency Coverage

5. David MalaspinaFIELDS I-PDR – DFB 5 Magnetic Field Science Drivers Magnetic Fields of Scientific Interest + DFB Frequency Coverage

6. David MalaspinaFIELDS I-PDR – DFB DFB Design Drivers Solar Probe Plus Science Challenges –Unknown / highly variable plasma environment – signal strengths are not well established. Requires large dynamic range. DFB has programmable gain states DFB uses low-noise operational amplifiers DFB has flexible configurations –Low telemetry volume. Requires on-board pre-selection of highest-rate data DFB has burst memory DFB has waveform compression DFB has flexible data rates Engineering Challenges –Low power and mass allocation DFB uses a Teledyne SIDECAR for A/D conversion –High temperature environment Requires testing and characterization at expected temperatures 6

7. David MalaspinaFIELDS I-PDR – DFB DFB Block Diagram 7

8. David MalaspinaFIELDS I-PDR – DFB DFB ETU #1 PWB Layout 8

9. David MalaspinaFIELDS I-PDR – DFB DFB FPGA DIAGRAM

10. David MalaspinaFIELDS I-PDR – DFB DFB Interface Documents Electrical –SPF_MEP_102_DFB_ICD_REV4 –SPP_SCM-REC-10000-SP-0081-LPC2E v1-2 –SPF_MEP_110_Connectors_REVA Command & Data –SPF_MEP_100_CDI_ICD_REV5 Mechanical –MICD SPP-MEP-MEC- TBD SPF-MEP-MEC-004 Rev01 MEP Daughter Board SPF-MEP-MEC-005 RevC MEP PCB Outline SPF-MEP-MEC-006 Rev01 DB Standoff SPF-MEP-MEC-010 Rev01 DB Insert SPF-MEP-MEC-011 Rev01 DB Push Stop MAV-IDP-MEC-009 RevC PCB Insert 10

11. David MalaspinaFIELDS I-PDR – DFB Analog DFB Processing 11 High level block diagram goes here Show schematic analog processing, digital processing

12. David MalaspinaFIELDS I-PDR – DFB 12 Digital DFB Processing

13. David MalaspinaFIELDS I-PDR – DFB DFB Development Status 13 Prototype DFB ETU #1 Xilinx FPGA DB ETU #2 Flatsat ETU #2 Flatsat SIDECAR Evaluation Board Flight DFB ETUs and Flight DFBs can accommodate all variations of FPGA DB: Xilinx, ProASIC, ProtoRTAX, Flt RTAX FPGA DB

14. David MalaspinaFIELDS I-PDR – DFB DFB Resources Mass –CBE 444 grams, NTE 524 grams Power –CBE 2.2 W, NTE 2.53 W Volume –9.2” x 6.2” x 0.713” per SPF-MEP-MEC-005 Telemetry to DCB –Survey Data Volume ≈ 15,750 bits/s –Spectral Data Volume ≈ 4,583 bits/s –Burst Data Volume ≈ 60,480 bits/s 14

15. David MalaspinaFIELDS I-PDR – DFB DFB BU Data Backup Information 15

16. David MalaspinaFIELDS I-PDR – DFB Level-3 Requirements (Time Domain) 16 Time domain (L3 DFB req.) E-DCE-ACSCM-LFSCM-MF # Components3331 Frequency Range DC – 7.5 kHz100 Hz – 60 kHz 10 Hz – 50 kHz 1 kHz – 60 kHz Amplitude Range +/- 10 V/m @ DC +/- 5 V/m @ 20 kHz up to 3000 nT @ 3.5 kHz up to 6 nT (@ 60 kHz) Resolution300 μV/m (+/- 10 V/m) 30 μV/m (+/- 1 V/m) @ DC (TBR) 160 μV/m @ 20 kHz 1 pT/√(Hz) @ 100 Hz 0.1 pT/√(Hz) @ 3.5 kHz 0.1 pT/√(Hz) @ 10 kHz

17. David MalaspinaFIELDS I-PDR – DFB Level-3 Requirements (Frequency Domain) 17 Freq. domain (L3 DFB req.) E-DCE-ACSCM-LFSCM-MF Frequency Range 5 Hz – 7.5 kHz100 Hz – 60 kHz 10 Hz – 50 kHz 1 kHz – 60 kHz Cadence1 spectrum / sec (max)

18. David MalaspinaFIELDS I-PDR – DFB Cycle Definition 18 All power supplies on SPP synchronized at 150 kHz + N x 50 kHz From EMC plan 150 kS/s DFB sampling is phase-locked with power switching for lowest noise But, digital processing is most efficient on data in powers of 2 150,000 is not a power of 2, closest is 2^17 = 131,072 Define a ‘cycle’ as 131,072 samples Time of one ‘cycle’ is 131,072 / 150,000 = 0.8738133... seconds Defining samples per cycle (S/c) instead of samples per second (S/s) DFB digital operations will be synchronized to a PPC (pulse per cycle) delivered by the DCB (digital control board)

19. David MalaspinaFIELDS I-PDR – DFB DFB Data Products (Time Domain) 19 Time domain Survey Waveforms VESCM Source Signals V1DC, V2DC, V3DC, V4DC, V5DC, E12DC (Lo, Hi) E34DC (Lo, Hi) EzDC (Lo, Hi) SCMxLF (Lo,Hi) SCMyLF (Lo,Hi) SCMzLF (Lo,Hi) Range+/- 115 V+/- 15 V/m (Lo) +/- 1.5 V/m (Hi) (w/ 2 m baseline) +/- 8 V (Lo) +/- 0.53 V (Hi) Resolution3.5 mV0.46 mV/m (Lo) 46 μV/m (Hi) (w/ 2 m baseline) 94 pT (Lo) 6 pT (Hi) Sample rate1 – 16,384 S/c CoverageContinuous @ 256 S/c

20. David MalaspinaFIELDS I-PDR – DFB DFB Data Products (Time Domain) 20 Time domain Burst Waveforms VESCM Source Signals V1AC, V2AC, V3AC, V4AC, V5AC, E12AC E34AC EzAC SCMxLF (Lo,Hi) SCMyLF (Lo,Hi) SCMzLF (Lo,Hi) SCMxMF Range+/- 10 V+/- 2.5 V/m (w/ 2 m baseline) +/- 8 V (Lo) +/- 0.53 V (Hi, MF) Resolution0.35 mV76 μV/m (w/ 2 m baseline) 94 pT (Lo) 6 pT (Hi) 12 fT (MF) Sample rate4096 – 131,072 S/c Coverage~4 second selected bursts @ 131,072 S/c

21. David MalaspinaFIELDS I-PDR – DFB DFB Data Products (Frequency Domain) 21 Frequency domain DC Power Spectra 1024-pt Hanning Window Cross Spectra 1024-pt Hanning Window Triggers Source Signals VDC, EDC, SCM-LF Frequency Range ~(10 - 4687) Hz ~(0.23 - 7500) Hz Frequency Resolution ~8% df/f (56 bins) ~4% df/f (96 bins) ~8% df/f (56 bins) ~4% df/f (96 bins) (3750-7500 Hz) / 2^N Reporting rate(1/8 – 128) Results/c (1/256 – 16) Results/c CoverageContinuous

22. David MalaspinaFIELDS I-PDR – DFB DFB Science Objectives and Heritage 22 Region of Study # of Units Waveform FunctionsWaves / Frequency Range Comment THEMISEarth’s Magneto- sphere 5E and B (SCM) survey E and B burst (6 kHz) Field-aligned E (de-rotating) Spectra – 2 Bands Broadband Filters 6 kHz One channel measured power to 500 kHz. Van Allen Probes (RBSP) Earth’s Radiation Belt 2E and B survey E and B burst 1 (800 Hz) E and B burst 2 (6 kHz) Field-aligned E (de-rotating) Spectra – 2 Bands Cross spectra Broadband Filters 6 kHz DCB created data packets. MAVENMars Iono- sphere 1Langmuir probe E survey E burst memory (2 MHz) Waveform compression Spectra – 3 Bands Active sounding 2 MHz One E channel. Two antennas. MMSEarth’s Magneto- sphere 4 + 4E and B survey E and B burst (100 kHz) E/B burst memory (100 kHz) Waveform compression Spectra – 2 Bands Broadband Filters 100 kHz Cold spare on each S/C. Seven units on orbit giving 39 unit–years of problem-free operation. No upsets or anomalies have been seen on any of the in-flight units.

23. David MalaspinaFIELDS I-PDR – DFB LASP Product Assurance Will follow LASP’s Quality Management System Plan and the SPP SMA Requirements and Compliance Matrix QA and project team have experience on multiple flight programs LASP’s standard build processes to be followed Assembly and inspection personnel certified to NASA workmanship standards Hardware inspection processes in place – MIPs to be performed by APL/SSL as required per SMA Matrix – LASP QA to inspect at vendor facilities if necessary Will follow LASP’s standard practices for contamination control LASP Alert and Advisory Procedure to be followed for GIDEP – GIDEP Representative in place Personnel trained and certified to LASP’s ESD Control Procedure – ESD Control program designed per ANSI/ESD S20.20 – Access to labs denied without ESD certification 23

24. David MalaspinaFIELDS I-PDR – DFB EEE Parts/PWB, Materials & Processes, and System Safety DFB will comply with parts control and materials & processes requirements per the SMA Requirements and Compliance Matrix –LASP EEE Parts Engineer will work with the UCB/SSL and JHU/APL Parts Control Board to assure that all parts and PWBs have approved for use Parts will be procured, and derated, to EEE-INST-002, Level 2 or better Will facilitate delivery of: PEPL, ADPL, and ABPL All PWB coupons shall be provided for test/approval at GSFC –LASP Materials Engineer will work with the UCB/SSL and JHU/APL MPCB to assure that all materials and processes are approved for use Evaluated in accordance with program requirements Will facilitate delivery of: MIL, ADMPL, and ABMPL DFB will support JHU/APL Mission System Safety Program Plan –Assist with Safety Requirements Compliance Checklist, OHA, Hazard Tracking Log –Initial Hazard Assessment revealed no applicable hazards No N 2 purge or high-pressure devices No high voltage No hazardous materials, flammable or explosives materials, or radiation sources In the event, exceptions will be noted through safety waivers/deviations 24

25. David MalaspinaFIELDS I-PDR – DFB DFB BOM 25 # Flight Part NumberManufacturerGeneric PNDescription StatusAnticipated UpscreeningLASP Comment 1OP262GSAnalog DevicesOP262IC OPAMP GP R-R 15MHZ DUAL 8SOIC Screen/Qual/Radiation 25962R1222201VXCIntersilISL70218 IC, LINEAR, DUAL, PRECISION, OPERATIONAL AMPLIFIER, MONOLITHIC SILICON Approved--Request early procurement (min buy) 3 AD648SQ/883; 5962-9753501VPA Analog DevicesAD648DUAL PRECISION, LOW POWER BIFET OP AMP -- 4JANTXV1N6642USMicrosemi1N6642DIODE SWITCH 100V 0.15A SOD123 Approved-- 55962F0821501VXCHoneywellHXS6408AVHSRAM, 512K X 8-BIT, 15 NS ACCESS TIME, LOW VOLTAGE --Request Approval priority and early procurement (min buy) 65962R0323601VXCAeroflexUT8R128K32-15WCA128K x 32 SRAM --Request Approval priority and early procurement (min buy) 75962R0820101VZAAnalog DevicesAD768SIC DAC 16BIT 30MSPS 28-SOIC --Request Approval priority and early procurement (min buy) 85962F0253201VXAST MicroRHFL7913KPA-01VNEG LDO REGULATOR From GSFCRequest Approval priority and early procurement (long lead and min buy) 93DSD512M16VS1605IS3D-Plus3DSD512M16VS1605ISSDRAM 32Mx16-SOP Datapack, DPARequest Approval priority and early procurement (long lead) 10SIDECAR ASICTeledyneSIDECAR ASIC --S/B approved already 11RH1021CMW-5/CMH-5Linear TechRH1021PRECISION 5V REFERENCE Datapack, DPARequest Approval priority and early procurement (long lead and min buy) 12JANSR2N2222AUBMicrosemi2N2222NPN SILICON SWITCHING TRANSISTOR ApprovedPIND 13HDLP11090SMDOA0P0HypertronicsHDLP11090SMDOA0P0HIGH DENSITY LOW PROFILE CONNECTOR, MALE --Request Approval priority and early procurement (long lead and min buy) 14HDLP11090SFDLA0P0HypertronicsHDLP11090SFDLA0P0HIGH DENSITY LOW PROFILE CONNECTOR, FEMALE --Request Approval priority and early procurement (long lead and min buy) 15HDLP11090SFCLANP0 Hypertronics Hypertac HDLP11090SFCLANP0 CONN, RECTANGULAR, 90 CONTACT, HIGH DENSITY, FEMALE, LOW HEIGHT VERTICAL, WITH GUIDE PINS --Request Approval priority and early procurement (long lead and min buy) 16HDLP11090SMCOANP0 Hypertronics Hypertac HDLP11090SMCOANP0 CONN, RECTANGULAR, 90 CONTACT, HIGH DENSITY, MALE, LOW HEIGHT VERTICAL, WITH GUIDE PINS --Request Approval priority and early procurement (long lead and min buy) 17311P407-2P-B-12PositronicSDD26M0000G-1082.24CONNECTOR, 26 PIN HIGH DENSITY, D-SUB, SOLDER CUP, MALE Approved-- 18MWDM2L-15P-6J5-18BGlenairMWDM2L-15P-6J5-18BCONNECTOR, D-SUB, MICRO-D -- 19311P407-1P-B-12PositronicSDD15M0000G-1082.24CONNECTOR, 15 PIN HIGH DENSITY, D-SUB, SOLDER CUP, MALE Approved-- 20311P409-2P-B-12PositronicSNDM0000G-1082.24CONNECTOR, 15 PIN MALE Approved-- 21MWDM2L-9S-6J5-18BGlenairMWDM2L-9S-6J5-18BCONNECTOR, D-SUB, MICRO-D -- 22G08P1PositronicMC8022D-50-1202.4 PLUGS, CRIMP, NON-MAGNETIC, SERIES 90, HIGH DENSITY CONNECTORS Approved-- 23G10P1PositronicMC6020D-50-1202.4 PLUGS, CRIMP, NON-MAGNETIC, SERIES 90, HIGH DENSITY CONNECTORS Approved-- 24311P829A CapacitorsPresidio311P829 Capacitors311P829 CAPACITORS Approved-- 25SR1825NPO822F250VNT95PresidioSR1825NPO822F250VNT958.2nF, 1%, 250V, 90/10 Sn/Pb OVER Ni, WAFFLE PACK -- 26MSK5978VRHGMS KennedyMSK5978RH VOLTAGE REGULATOR, LDO, ADJUSTABLE, 700mA, RAD HARD, CFP- 10 Precap/PINDRequest Approval priority and early procurement (long leand and min buy) 275962F8762401VXAST MicroRHFAC14K02VIC HEX INVERTER SCHMITT TRIGGER CMOS, CFP-14 PIND 28M834446/39-272J-30FAPI DelevanMIL1812 (M83446)RF INDUCTOR Thermal shock/burn-inRequest Approval priority and early procurement (long leand and min buy) 29M27/367-13L-21API DelevanMIL4922 (MIL-PRF-27/367)POWER INDUCTOR Thermal shock/burn-inRequest Approval priority and early procurement (long leand and min buy) 30400102302xxxxL9 ESA ResistorsVishayPHR0805CxxxxLB/CRCW0805xxxxFKEAESA RESISTORS --Request Approval priority and early procurement (long leand and min buy) 39400102303xxxxL9 ESA ResistorsVishayPHR1206CxxxxLB/CRCW120xxxxFKEAESA RESISTORS --Request Approval priority and early procurement (long leand and min buy) 40M55681 CapacitorsQPLProduct level SM55681 CAPACITORS Approved-- 41M55365 CapacitorsQPLProduct level CM55365 CAPACITORS Approved-- 42M55342 ResistorsQPLProduct level RM55342 RESISTORS Approved-- 43JANSR2N2907AUBMicrosemi2N2907TRANSISTOR, PNP PIND 44CWR19CC227KCHBQPLCWR19CC227KCHBCAPACITOR, TANTALUM -- 455962-08224ActelRTAX4000SL-1CG1272BFPGA, 4000 gate array -- 465962R9560403VXANational SemiLM6172AMGWRLQVOP AMP, DUAL, HIGH-SPEED, LOW-POWER --

26. David MalaspinaFIELDS I-PDR – DFB DFB Schedule 26 Critical path is thru ETU Reserve held @ 1mnth/year Schedule threat is PWB Deflection and component integrity Risk mitigation is Vibe Test ETU1 ETU2

27. David MalaspinaFIELDS I-PDR – DFB Likelihood of Occurrence (probability) Consequence of Occurrence (Impact) 5 4 3 2 1 12345 HighMediumLow (Criticality) P = Performance C = Cost S = Schedule M = Mass IDTITLEPICritRetire At FF-DFB01SIDECAR workmanship23 L Post PDR characterization testing F-DFB01 PM If the SIDECAR experiences latent failure and/or has reliability issues, then the lack of a complete EIDP and respective workmanship could hinder the debug/troubleshooting, and have the potential to degrade performance and warrant possible redesign which could increase needed mass and power. Risk mitigation plan is to perform characterization and environmental testing on SIDECARs. These parts have prior electrical burn-in testing hence characterization and environmental tests will demonstrate good rigor to retire the risk. Risk rating: Probability 2, Impact 3; not likely to occur based on successful burn-in testing completed by GSFC/Teledyne; consequences slightly higher based on possibility of reverting to backup plan of discrete ADCs. Proposed/heritage ADCs are not as rad-tolerant, require more board space (mass increases), more power, and/or could drive science return. Newer, more viable, ADCs identified but require radiation testing. DFB SIDECAR Qualification Workmanship Risk

28. David MalaspinaFIELDS I-PDR – DFB Likelihood of Occurrence (probability) Consequence of Occurrence (Impact) 5 4 3 2 1 12345 HighMediumLow (Criticality) P = Performance C = Cost S = Schedule M = Mass F-DFB02 PMSC If the DFB PWBA experiences too high of structural deflection, then the assembled components may experience package stresses, with respective workmanship and/or reliability issues. The primary concern is the SIDECAR CGAs. This potential could warrant possible redesign of the PWB layout, structural stiffness design, or reduction in DFB capability due to replacing the SIDECAR/other components to stay within mass and power constraints. Analysis and part modeling in process now. Risk mitigation plan is to perform vibration testing to SPF-MEP vibration levels on an ETU PWB with representative components and mass models. Analysis and modeling, along with vibration testing, must prove the PWBA design and demonstrate good rigor to retire the risk Risk rating: Probability 2, Impact 4; not likely to occur based on analysis and modeling and good design practices of the PWBA. Consequences higher based on possibility of impact at a PDR level which may require redesign and/or reverting to backup plan of discrete ADCs. Analysis completing, vibe test post PDR. DFB PWBA Structural Risk IDTITLEPICritRetire At F- DFB02PWB Structural Deflection24 M Post PDR vibration testing

29. David MalaspinaFIELDS I-PDR – DFB DFB Related Action Items 29 DFB Peer Review held Nov 4-5 th, materials available on SPF site Action Items from this and other Peer reviews included here (SCM Peer Review Sept 4-5, 2013)