1. AN INVESTIGATION INTO THE REQUIREMENTS OF A PC-BASED LEARNING ENVIRONMENT FOR THE EDUCATION OF MICROELECTRONIC TEST ENGINEERING Joseph Walsh and Ian Grout Joseph Walsh Department of Electronic & Computer Engineering University of Limerick Limerick, Ireland Email: Joseph.Walsh@ul.ie

2. Presentation overview Introduction. Introduction to the testing of Integrated Circuits. Why Test ?. Discuss the role of a Microelectronic Test Engineer. Identify the requirements for effective Test Education. Remote Learning. The Importance of Interactivity when Learning. Microelectronics using a computer-based solution. Describe a new Test Engineering Development Laboratory Box. Discuss the System Operation. Conclusions and future work.

3. Introduction There are a number of avenues that can be followed in the area of microelectronic test education, depending on the skills set requirements of the students. hardware test. software test. This project will concentrate on hardware Integrated Circuit (IC) test in particular. There will be a review of test teaching approaches and methodologies. But the primary objective is to develop suitable PC based laboratory experiments for microelectronic test engineering education. To support Test Engineering modules at the University of Limerick.

4. Introduction to the testing of Integrated Circuits Why Test ?. Testing provides a means of ensuring that a product design is correct. When a product is fabricated, there is a need to test the product in order to ensure that faulty products are not delivered to the customer. Testing of products also provides important feedback about the design and fabrication of the product in order to improve the product quality. There is a cost associated with testing and this has to be minimised.

5. If it costs 1 cent to locate an Integrated Circuit fault at wafer level. The rule of 10

6. Introduction to the testing of Integrated Circuits The testing of Integrated Circuits has become increasingly important, With ever increasing requirments for; Placement of more circuity on the silicon die, Finer device geometries/nanotechnology, Higher device reliability, Lower overall production costs (including test costs) Processor Year of Production No. of Transistors Pentium 19933,100,000 Pentium II 19977,500,000 Pentium III 199924,000,000 Pentium 4 200042,000,000 Over the past twenty years transistor design, fabrication and manufacture costs have reduced, but the cost to test a transistor has remained roughly the same. This is a major problem.

7. MOORE’S LAW (Gordon Moore, Intel) Moore predicted that the number of transistor per Integrated Circuit would doubling of transistors every 18 months. (Source: Intel)

8. A Predication By the International Technology Roadmap For Semiconductors

9. The Cost to Test a single transistor must be made to track Moore’s Law.

10. The microelectronic test engineer will be required to work in a production team environment primarily alongside the design engineer. This requires insight and understanding into the role and requirements for design and fabrication, alongside the specific requirements for test. The role of a Microelectronic Test Engineer

11. The requirements for Test Education In many cases, Microelectronic Test Engineering concepts have historically been taught as an “add-on” to a design oriented course. Today’s Microelectronic Test Engineer needs to have a greater understanding of design, test and Design for Testability (DfT). A Microelectronic Test Engineering learning environment, should discuss test concepts, in the testing of Integrated Circuits during, and post-fabrication. Introduce the design and test of specific circuit architectures. Practice the design and test of electronic circuits emulating a complex digital logic IC in both fault-free and specific fault conditions.

12. The requirements for Test Education The circuit designs should investigate the test requirements of circuits ranging in complexity from a few gates and upwards, for example memory and simple ALU (Arithmetic and Logic Unit) type of designs. No matter how complex a microelectronic circuit design becomes, testing of the design relies on basic concepts, which can be obtained from suitably defined third level education.

13. Remote Learning Remote learning can have a number of advantages over a conventional classroom. Some students are reserved and shy by nature and are reluctant to ask questions or may not ask even a single question throughout a course. In a remote learning class with technical support, the reserved students excel - they can ask as many questions as they want. One of the most exciting new trends in education is the use of remote learning. Remote Learning has to be considered in any learning environment.

14. The Importance of Interactivity when Learning Research on remote learning has shown that students' retention of knowledge increases from 20% to 75% of the total amount of information when students interact with the teaching materials.

15. Microelectronics using a computer-based solution The main advantage of learning microelectronics using a computer- based solution; The students have greater flexibility and can use different time frames for learning each lecture as a function of their background. The lectures may then be a discussion about the subject giving time for creative debates, which can be very productive. Allows the students to perform circuit simulations. The progression of each student can give the lecturer feedback, regarding the benefits, and drawbacks of the remote learning environment.

16. Test Engineering Laboratories

17. Built in Self-Test (BIST) Example Incorporate scan path testability, using a Linear Feedback Shift Register (LFSR) arrangement for circuit under test (CUT), test vector generation and analysis. One of the Test Engineering modules this year at the University of Limerick looked at simulating a Built In Self Test (BIST) circuit, using Cadence Design Framework II software.

18. Circuit Under Test (CUT) Schematic Simulation tools are extremely useful, but they do not allow for a practical feel for the testing a circuit.

19. A Test Engineering Development Laboratory Box As an alternative a Test Engineering Laboratory Environment that would allow a user to; rapidly design a number of application circuits on a PC using a particular CAD software, e.g. state machines, counters, memory blocks, registers, Arithmetic and Logic Unit (ALU) and simple CPU) designs, download the designs to a single device, a CPLD (Complex Programmable Logic Device) under both fault-free and specific fault conditions, run experiments in order to determine suitable test vectors for the particular design. This type of arrangement may be of great benefit to future microelectronic test engineers.

20. A new University of Limerick Test Engineering Development Box (ULTEDB) The basic system would consist of a PC based tester environment where the user would start a run a software program (e.g. Labview, Visual Basic (VB) ), and the Lattice ispDesignEXPERT software. Both tools would then interface through the PC serial port (RS232) for circuit data I/O and the PC parallel port, using the JTAG (Joint Test Action Group) boundary scan interface.

21. The user would then be able to investigate, PC interfacing, use of the Lattice tools, JTAG protocal and also download circuits on to the CPLD, which is located within the ULTEDB. A new University of Limerick Test Engineering Development Box (ULTEDB) The user can produce a test vector set for the circuit using the software in order to determine suitable test vectors for the particular design.

22. A new University of Limerick Test Engineering Development Box (ULTEDB)

23. Conclusions and future work This paper has described a project that is aimed at looking to improve microelectronic test education. By looking at different teaching methodologies and approaches, and by developing a new Test Engineering Development Box. The rationale for this is that today’s test engineer needs to have a greater understanding of design, test and Design for Testability (DfT). A CPLD in the suggested environment can provide a way of rapidly implementing a range of circuits, in fault, or fault free conditions. Future work, will be to set up a range of laboratory experiments that will allow students to develop the concepts discussed in this presentation.

24. Acknowledgements The authors would like to thank the University of Limerick Foundation for the funding to support the remote laboratory access project with the TRIP initiative managed by the centre for Teaching and Learning at the University of Limerick. Thank you for your attention