# Discrete event simulation. About me Name : Tiberiu Petre(call me Tibi, Tib,etc.) Job : Hardware Design and Verification Engineer Experience : 5+ years.

## Presentation on theme: "Discrete event simulation. About me Name : Tiberiu Petre(call me Tibi, Tib,etc.) Job : Hardware Design and Verification Engineer Experience : 5+ years."— Presentation transcript:

Discrete event simulation

About me Name : Tiberiu Petre(call me Tibi, Tib,etc.) Job : Hardware Design and Verification Engineer Experience : 5+ years Tools used : HDL simulators Languages : Verilog, VHDL, e, SystemVerilog, C++, SystemC, Matlab

Simulation What is it? Simulation is the imitation of the operation of a real-world process or system over time.(Wikipedia) Why do we need to simulate stuff? Sometimes we can't intuit or anticipate the behavior of some types of systems. We need simulation to analyze and understand the behavior of complex systems.

Simple example An AND gate No need to simulate this It's very simple We can visualize its behavior without the need of a computer

Complex example A finite state machine

Another complex example Conways Game of Life

Discrete event simulation The operation of a system is represented as a chronological sequence of events time

Simulation constraints We don't want any uncertainty Everything has to be deterministic When a scenario is simulated multiple times with the same initial conditions the output of the simulation should be the same(reproducibility)

Simulation concerns Simulating parallelism Simulating time Simulating discrete events Simulating randomness Simulating communication

Simulating parallelism Interleaved actions(race conditions)

Race conditions Interleaved actions(race conditions) int x = 0; f(x) g(x) Thread 1Thread 2 X = ??? Sollution : Mutexes

Execution order Unpredictable execution order int x = 0; f(x) g(x) Thread 1Thread 2 Who gets to x first? f got xg got x

Coroutines The OS kernel is replaced by the Simulation Kernel The programmer(not the compiler) decides when each thread gives control to the SK T1 T2T1 SK How can we rely on the SK? How does the SK remove the uncertainty? def my_thread(): do_something(anything) yield do_something(else)

Simulating time Simulated time wait(1000 ms); global_time_counter+=1000 ms;

Simulating time Simulated time wait(1000 years); global_time_counter+=1000 years; We make it look as if 1000 years have passed

Applications Financial models – they work with large periods of time(days, months, years) Digital system models – they work with small periods of time(ms, ns, ps, fs)

Simultaneity With native threads and real time: possible on multi-core/multi-processor architectures but very unlikely(impossible in practice) With coroutines and simulated time: we can make it look as if it happens :-) def thread1(): wait(1s) action1() def thread2(): wait(1s) action2()

Time over multiple threads Many threads – one global time counter How do we update it? def thread1(): wait(1s) action1() wait(3s) def thread2(): wait(10s) action2() wait(1s) def thread3(): wait(3s) action3() wait(5s) The SK updates the GTC not the threads Threads must pass control to the SK when they want to consume time

Delta cycle Evaluate Update

Simulation algorithm def simulate(): while not all threads finished: evaluate() update()

Example def thread1(): wait(1s) action1() wait(3s) def thread2(): wait(10s) action2() wait(1s) def thread3(): wait(3s) action3() wait(5s) GTC T1 T2 T3 0s1s 3s4s8s10s 11s w1sw3s w1sEND w10sw9s w7sw6sw2sw1sEND w3s w2sw5s4wsEND a1 a3 a2

Simulating events Emitting events Waiting on events Event callbacks Events over multiple threads

Simulating events What is an event? It is a message indicating that something has happened time Button pressed Door openDoor closed

Using events Events can be emitted x = 0 emit(x_has_been_reset) Events can be waited on wait(x_has_been_reset) do_something_with(x)

Event callbacks Events can trigger actions(callbacks) on(x_has_been_reset): do_something()

Events over multiple threads Events are emitted and waited over multiple threads How do we simulate them? def thread1(): action1() emit(ev1) def thread2(): wait(ev1) action2()

How emit works Events can have 2 states : emitted, idle Emit does not suspend thread execution Emit does not consume time def emit(event): sk.event_states[event] = emitted

How emit works Emits are resolved during the evaluation phase def evaluate(): for each thread in threads: if thread is scheduled for resumption: resume(thread) # this is where emits might be called

How wait works Waits are resolved during the update phase Waits suspend thread executions Waits might consume time def update(): # time management code... for each thread in threads_that_wait_events: if events_waited[thread].state == emitted: schedule_resume(thread)

Simple example Evaluate: action1() is executed Evaluate: ev1 is emitted Evaluate: thread2 is suspended waiting for e1 Update: thread1 is marked as finished Update: thread2 is scheduled for resumption Evaluate: thread2 is resumed, action2() is executed Update: thread2 is marked as finished Evaluate: all threads are finished, simulation ends def thread1(): action1() emit(ev1) def thread2(): wait(ev1) action2() T1 T2 a1 ->ev1 a2 END wev1EN D

Temporal expressions event my_ev is {e1,10s,2*e2,1s,e3} e1 e2 e3 my_ev 10s 1s

Temporal assertions assert e1 => {[5s..10s],2*e2,1s,e3} e1 e2 e3 7s 1s Assertion passed Assertion evaluation starts

Simulating randomness We must use pseudo-randomization We must set an initial seed which will guarantee us that the sequence of generated random numbers will be the same every time we rerun the simulation with the same seed set_seed(16182) for i from 1 to 10: x=rand() print x

Pseudo randomness Linear feedback shift registers

Pseudo randomness Linear feedback shift registers

Pseudo randomness Polynomials for maximal LFSRs

Constrained randomization Requires a constraint solver struct my_struct_t { x:uint; y:uint; keep x+y==10; keep x !=7; }; extend sys { s : my_struct_t; run() is also { gen s; print s; };

Simulating random execution order We can (pseudo-)randomize the way in which threads are resumed def evaluate(): randomize thread execution order for each thread in threads_in_random_order: if thread is scheduled for resumption: resume(thread) We can also (pseudo-)randomize the way in which event callbacks are executed

Simulating Communication Producers and consumers Initiators and targets Broadcasting

Simulating Communication Producers and consumers ProducerConsumer

Simulating Communication Initiators and targets InitiatorTarget

Simulating Communication Producer-initiator and consumer-target Producer Initiator Consumer Target

Simulating Communication Producer-target and consumer-initiator Producer Target Consumer Initiator

Simulating Communication Broadcast Producer Consumer1 Consumer2 Consumer3

Boosting simulation performance Parallelize independent threads Parallelize execution of independent event callbacks Temporal decoupling

Visualizing simulation output Waveforms Plots Logs Write your own scripts for processing simulation output

Exercise def T1(): while true: wait(1s) emit(e1) a1() def T2(): for i from 1 to 2: wait(e1) a2() kill(T1) a3() 0s1s2s3s 4s w1s END we1 END ->e1 a1 ->e1 a1 ->e1 a1 a2 GTC T1 T2 a2 kill(T1) a3

Applications HDL Simulators Virtual Platforms for early software development Architectural exploration Performance evaluation Turn-based strategy games Back-in-time debugging Cause analysis Business model simulation

Further reading A Curious Course on Coroutines and Concurrency, David Beazley - http://dabeaz.com/coroutines/http://dabeaz.com/coroutines/ SystemC - http://www.accellera.org/home/http://www.accellera.org/home/ Transaction Level Modeling - http://en.wikipedia.org/wiki/Transaction-level_modeling http://en.wikipedia.org/wiki/Transaction-level_modeling Coroutines in C - http://www.chiark.greenend.org.uk/~sgtatham/coroutines.html http://www.chiark.greenend.org.uk/~sgtatham/coroutines.html

Questions and/or comments THANK YOU !!!

Download ppt "Discrete event simulation. About me Name : Tiberiu Petre(call me Tibi, Tib,etc.) Job : Hardware Design and Verification Engineer Experience : 5+ years."

Similar presentations