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4.0 rtos implementation part II

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Presentation on theme: "4.0 rtos implementation part II"— Presentation transcript:

1 4.0 rtos implementation part II
BEH30802 :: REAL-TIME EMBEDDED SYSTEM Mohamad Fauzi bin Zakaria 4.0 rtos implementation part II

2 ChibiOS/RT – Part II 4.5. Introduction to Serial Communication Protocol 4.6. Universal Asynchronous Receiver Transmitter (UART) 4.7. Inter-integrated Communication (I2C) 4.8. Serial Peripheral Interface (SPI)

3 Overview Serial Parallel Receiver Receiver 1 bit 1 word Transmitter

4 Serial vs parallel SERIAL PARALLEL COST Cheap Expensive SPEED Slow
Fast TRANSMISSION AMOUNT Single bit 8 bits (8 data lines) Transmitter & Receiver TRANSMISSION LINES One line to transmit one to receive 8 lines for simultaneous transmission TRANSMISSION DISTANCE Long Short distance (synchronization)

5 Data transmission

6 Serial communication method

7

8 In-vehicle network

9 RS232 - UART Common baud rate: 9600 or11.2k bps Signal level: TTL (direct) or RS232(needs line driver) Was set by the Electronics Industries Association (EIA) in 1960, before the advent of TTL logic family. Therefore, logic 1 is represented by “-3 to -25V”, and logic 0 is “+3 to +25V”. Two types of RS232 pins: DB-25 and DB-9. Most important pins are Tx, Rx, and ground. To interface with microcontroller, we need line driver such as MAX232 (need capacitors) or MAX233 (no capacitors).

10 RS232 vs TTL RS232 TTL

11 Example of ttl uart

12 Inter-Integrated Circuit (I2C)
Developed by Philips Semiconductor for TV sets in the 1980’s I2C devices include EEPROMs, thermal sensors, and real-time clocks Used as a control interface to signal processing devices that have separate data interfaces, e.g. RF tuners, video decoders and encoders, and audio processors. Limited to about 10 feet for moderate speeds

13 I2C Bus Configuration 2-wire serial bus – Serial data (SDA) and Serial clock (SCL) Half-duplex, synchronous, multi-master bus No chip select or arbitration logic required Lines pulled high via resistor

14 I2C Protocol Communication Speed (Data rate) Normal mode: 100 kHz
Fast mode: 400 kHz Fast mode plus: 1MHz High-speed mode: 3.4MHz Ultra-fast mode: 5MHz

15 I2C Tradeoffs Advantages Disadvantages
Good for communication with on-board devices that are accessed occasionally. Easy to link multiple devices because of addressing scheme Cost and complexity do not scale up with the number of devices Advantages The complexity of supporting software components can be higher than that of competing schemes (for example, SPI ). Disadvantages

16 Serial Peripheral Interface (SPI)
Defined by Motorola on the MC68HCxx line of microcontrollers Generally faster than I2C, capable of several Mbps Applications: Like I2C, used in EEPROM, Flash, and real time clocks Better suited for “data streams”, i.e. ADC converters Full duplex capability, i.e. communication between a codec and digital signal processor

17 SPI Bus Configuration Synchronous serial data link operating at full duplex Master/slave relationship MOSI – master data output, slave data input MISO – master data input, slave data output 2 data signals: SCLK – clock /SS – slave select (no addressing) 2 control signals:

18 SPI vs. I2C Less overhead than I2C due to lack of addressing, plus SPI is full duplex. For point-to-point, SPI is simple and efficient More effort and more hardware than I2C For multiple slaves, each slave needs separate slave select signal

19 Spi protocol Master and slave must agree on parameter pair values in order to communicate CPOL CPHA Active edge Rising 1 Falling 2 Parameters, Clock Polarity (CPOL) and Clock Phase (CPHA), determine the active edge of the clock

20 SPI Protocol (cont.)


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