1. Michiel De Wilde & Olivier Rits Ghent University, Belgium IMEC
Design methodology development for VCSEL-based guided-wave optical interconnects
Michiel De Wilde & Olivier Rits
Ghent University, Belgium
IMEC
Design methodology development for VCSEL-based optical interconnects.

2. Design methodology development for VCSEL-based optical interconnects.
Overview
Optical interconnect
rationale & structure
Optical interconnect design space
exploration & optimization
Simulations to extract system-level properties
Design methodology development for VCSEL-based optical interconnects.

3. Optical interconnect rationale (1)
Moore’s Law
(source: Intel)
Denser inter-chip interconnect requirement
Rising clock frequencies
Design methodology development for VCSEL-based optical interconnects.

4. Optical interconnect rationale (2)
ground plane
signal wire A
wire length = L
Inter-wire spacing area
Wire capacitance + resistance & skin effect
limit the electrical interconnect bandwidth B s
bits 10 2 17 L A B @
(Miller-Ozaktas)
Design methodology development for VCSEL-based optical interconnects.

5. Optical interconnect rationale (3)
Problematic interconnect between ICs and at the IC access level
Industrial packet routers
Some parallel and distributed processing systems
Use of optics: a solution on physical grounds
No electromagnetic interference problems
Almost distance & frequency independent losses
Optical I/O integration with CMOS solves interconnect problems at the IC access level
Design methodology development for VCSEL-based optical interconnects.

6. VCSEL-based parallel optical I/O
Connector
Fiber bundle
Package
PCB
VCSELs
Photodiodes
Solder balls
CMOS substrate (top side visible)
Design methodology development for VCSEL-based optical interconnects.

7. Design methodology development for VCSEL-based optical interconnects.
Fields involved
VCSEL
technology
Optical waveguides
Photodetector
technology
Connectorization
Optics-CMOS
hybridization
Driver & receiver
circuitry TX
IC packaging
Clock re-sync
circuitry
Waveguide routing technology
Design methodology development for VCSEL-based optical interconnects.

8. Complex design space Several approaches are possible
Some continuously valued parameters too
λ, operating currents, numerical aperture, physical dimensions…
Decisions in one field may affect other fields
Increase of numerical aperture of fiber
better
coupling
less
bend
losses
worse
coupling
(not to scale)
Design methodology development for VCSEL-based optical interconnects.

9. Design methodology development for VCSEL-based optical interconnects.
Design optimization
Systematic way of making choices = design methodology
Designer states constraints
Tool suggests good solutions meeting constraints
Important system-level property categories
Technological feasibility
Performance (timing/power characteristics)
Reliability
Implementation cost
Design methodology development for VCSEL-based optical interconnects.

10. Design methodology development
VCSEL drive current
Photodetector sensitivity
Fiber numerical aperture
Interface technology …
Product and parameter choices
STAGE 2
Construct multi-objective solution
(e.g.) link bit error rate
(e.g.) total power dissipation
Infeasible design region
Sub-optimal
designs
Pareto-optimal
STAGE 1
predict
STAGE 3
target
Power dissipation
Link latency
Link reliability
Link skew
Implementation cost
System-level properties …
The construction of this design methodology is a three-stage process: in a first stage, we develop tools to predict the combined effect of different design options on objectives which are directly relevant for system-level characteristics. We have been doing this, and I will talk about it in the next slides.
The second stage is an exploration of the design space for combinations of design choices that are Pareto-optimal with respect to the objectives. Pareto optimality is a term originating from economics which means that for any solution that is Pareto-optimal, you cannot improve one objective without giving in on some other objective. For example, the chart on the right represents a tradeoff between power consumption and link bit error rate. The crosses represent the outcome of feasible design choices. Now, the red crosses are not Pareto-optimal, because there is always a green cross that is better on both the power usage and the link bit error rate. The line connecting the green crosses is called the Pareto-optimal front, and represents the optimal tradeoff that you can achieve.
The third stage, is the one where make the reverse mapping: starting from given objectives, using the result from stage 2, try to predict the design options that achieves these objectives.
Design methodology development for VCSEL-based optical interconnects.

11. Estimating timing/power/reliability
Issues for direct estimation (e.g. from tabular data)
Non-linear interactions between different fields (electrical, optical, thermal)
Impact of noise and process variations
Interconnect simulation
Simulator
Simulator models
Stimuli
Calculation of properties from simulation results
Design methodology development for VCSEL-based optical interconnects.

12. Design methodology development for VCSEL-based optical interconnects.
Simulator models
VCSEL model
VCSEL
driver model
Photodetector
model
Photodetector
receiver model
Clock re-sync
model
Optical path model
Design methodology development for VCSEL-based optical interconnects.

13. Design methodology development for VCSEL-based optical interconnects.
Simulator choice
Device-level simulators
OptiWave, RSoft, WinLase, …
Too detailed (some parameters are IP)
Too slow for this purpose (finite-element methods)
Circuit-level simulators
SPICE, Verilog-AMS, VHDL-AMS, …
More concise parameter set possible
Faster (only integration over time)
Design methodology development for VCSEL-based optical interconnects.

14. Example: photodiode model
module pin_photodiode(in,anode,cathode);
input in;
inout anode, cathode;
power in;
electrical anode, cathode;
parameter real Cdep=0, Cbo=0,
Rbas=0, Resp=0, Id=0;
parameter real pole=-1/(Cdep*Rbas);
parameter real laplace_coeff_0=Cdep+Cbo;
parameter real laplace_coeff_1=Cdep*Cbo*Rbas;
charge rc;
analog begin
I(cathode,anode) <+ laplace_zp(Resp*Pwr(in)+Id,{},{pole,0});
Q(rc) <+ laplace_np(V(cathode,anode),{laplace_coeff_0,laplace_coeff_1},{pole,0});
end
endmodule
Terminals
Model parameters
Equations describing internal state and outputs
Design methodology development for VCSEL-based optical interconnects.

15. Driver/receiver model
Normal analog electrical circuits
IP protection: no real circuit provided
Alternative: parameterised flowchart
Validation: measurements on non-hybridized CMOS
Receiver flowchart
Photocurrent
input
Transimpedance preamplifier
Postamplifier
Equalizer
Now I will talk to you about some models and issues associated with them. You would think that implementing simulation models for the driver and receiver circuits is very simple because you can just give the analog circuit schematic to the circuit simulator.
Sadly, you will probably never see the real driving circuit as the creator wants to treat it as an IP block.
The next best alternative that you have is composing a simplified model, a flowchart of interconnected parameterised behavioural specifications of the main subcircuits of the driver and receiver.
It is not easy to get specifications that are detailed enough to take effects like power spikes into account, but that don’t betray the exact circuit constitution. But it is possible.
Limiting amplifier
Decision circuit
Digital output
Design methodology development for VCSEL-based optical interconnects.

16. Design methodology development for VCSEL-based optical interconnects.
VCSEL model
Nonlinear differential equation system
Jungo, et.al.: VISTAS software package
equations without spatial integration
Difficult parameterization
Validation: measurements on non-hybridized VCSELs
(source: M.X. Jungo)
The VCSEL behaviour is described by well-known multimode rate equations for the carrier and photon densities in the cavity. We use the simplified model by Mena and Morikuni where an assumption of the VCSEL mode profiles removes all spatial dependencies from the equations so that you don’t have to do time-consuming spatial calculations.
There are a lot of issues with implementing the VCSEL rate equations: for instance to make the simulator converge you need to scale down some quantities and equations, and force some values to be positive, but that is not very difficult. A problem that we still sometimes have is getting the simulator to produce an initial operating point at the start of a transient simulation: the Newton-Rhapson method that is used to that end in Spectre and the most other simulators is often not powerful enough.
Finally, we found that is not easy to translate real VCSEL measurements into the model parameters that gives the best fit because there are a lot of parameters.
Design methodology development for VCSEL-based optical interconnects.

17. Fiber-based optical path
Abstraction of dispersion (short distance)
Coupling coefficients for losses & crosstalk
VCSEL-fiber crosstalk
Fiber-photodetector crosstalk
Fiber-photodetector coupling losses
VCSEL-fiber coupling losses
absorption
macrobend
losses
For the optical path, we currently
Connector losses & crosstalk
(not to scale)
Design methodology development for VCSEL-based optical interconnects.

18. Design methodology development for VCSEL-based optical interconnects.
Fiber bend losses
Bend losses can be approximated using a combination of raytracing results (H. Lambrecht, et.al.)
Validation through optical path measurements
90° bend
X axis: NA fiber
Y axis: bending radius
Blue color = high losses
(source: H. Lambrecht)
Design methodology development for VCSEL-based optical interconnects.

19. Simulation illustration
(exaggerated VCSEL model parameters)
(inverted output)
Design methodology development for VCSEL-based optical interconnects.

20. Design methodology development for VCSEL-based optical interconnects.
Simulation setup
Interconnection signals
Digital pseudorandom
Design-specific
Parameters
Process corners
Monte-Carlo generated
+ inter-device correlation
Noise
asynchronous
synchronous
mesochronous
Predominant noise: substrate noise at the receiver preamplifier
amplify some few µA of photocurrent
Design methodology development for VCSEL-based optical interconnects.

21. Design methodology development for VCSEL-based optical interconnects.
Conclusion
Illustrated optical interconnect
rationale & structure
Discussed optical interconnect design space
exploration & optimization
Simulations to extract system-level properties
Explained approach
Discussed models
Future work
Design methodology development for VCSEL-based optical interconnects.

22. Design methodology development for VCSEL-based optical interconnects.
Acknowledgements
IST Interconnect by Optics project partners
Hannes Lambrecht (Ghent University, IMEC-INTEC)
Fiber bend losses modelling
Marc Jungo
VISTAS VCSEL modelling project
Fund for Scientific Research – Flanders (Belgium) (F.W.O.)
Research assistantship
Design methodology development for VCSEL-based optical interconnects.