1. Chapter 6 External Device

2. Contents External Devices I/O Modules Programmed I/O
Interrupt-Driven I/O
Direct Memory Access
I/O Channel and Processors
The External Interface:SCSI and FireWire 22

3. Overview
External Devices
Input / Output modules are the third critical element of the computer system (others are the CPU and the memory)
Why one does not connect peripherals directly to the system bus
Variety of peripherals with various methods of operation
Data transfer rate of peripherals is slow
Different data format and word lengths
I/O module major functions
Interface to the processor and memory via the system bus or central switch
Interface to the one or more peripheral devices by tailored data links 22

4. Generic Model of an I/O Module
External Devices 22

5. Peripheral device
External Devices
External device is referred to as a peripheral device
External Device
Human readable
VDT(video display terminal)
Machine readable
Magnetic disk, tape systems, sensor
Communication 22

6. External Device
External Devices 26

7. Keyboard/Monitor Most common means of computer/user interaction
External Devices
Most common means of computer/user interaction
Basic unit of exchange is the character
ASCII is most commonly used

8. America Standard Code
External Devices 31

9. ASCII Control Characters
External Devices

10. ASCII Control Characters
External Devices

11. ASCII Control Characters
External Devices

12. ASCII Control Characters
External Devices

13. Disk Drive
External Devices
Disk driver exchanges data, control, status signal with an I/O module plus the electronics for controlling the disk read/write mechanism
Fixed-head disk
Convert the magnetic patterns on the moving disk surface to bits in the devices buffer
Moving-head disk
Cause disk arm to move in and out across the disk’s surface

14. Module Function Major funtion for an I/O module Control and timing
I/O Modules
Major funtion for an I/O module
Control and timing
Processor communication
Device communication
Data buffering
Error detection

15. Control and timing Control step of the transfer data
Processor interrogates the I/O module
I/O module returns the device status
Transfer data by means of a command to the I/O module
I/O miodule obtains a unit of data
Data are transferred from the I/O module to the processor

16. Processor communication
Command decoding
I/O module accepts commands from processor
Data
Exchange data between processor and I/O
Status reporting
It is important to know status of I/O module
Common status signal : BUSY, READY
Address recognition
Each I/O device has an address
An I/O module must recognize one unique address for each peripheral it controls

17. I/O Device Data Rates
External Devices

18. Device communication
External Devices
Device communication involves commands, ststus information, and data

19. Data buffering
External Devices
Data coming from main memory are sent to an I/O module in a rapid burst
Data are buffered in the I/O module and then sent to the peripheral device at it data rate
In opposite direction, data I/O module must be able to operate at both device and memory speeds.

20. Error detection
External Devices
I/O module is responsible for error detection and for subsequently reporting errors to the processor

21. I/O Module Structure
External Devices
Connect to the rest of the computer through a set of signal lines
I/O module function to allow the processor to view a wide range of devices in a simple-minded way
I/O channel
Quite primitive and requires detailed control
Commonly seen on the microcomputer
I/O controller
Used on mainframes

22. Block Diagram of an I/O Module
External Devices

23. Three Techniques for I/O Operations
Programmed I/O
Programmed I/O
Interrupt driven I/O
DMA
No Interrupts
Use of Interrupts
I/O-to-memory transfer through processor
Programmed I/O
Interrupt-driven I/O
Direct I/O-to-memory transfer
Direct memory access
(DMA)

24. Overview
Programmed I/O
Processor execute program that give it direct control I/O operation
I/O module perform the requested action
Set the appropriate bits in the I/O status register
I/O module takes no further action to alter the processor
It does not interrupt the processor

25. I/O Commands Four type I/O commands Control
Programmed I/O
Four type I/O commands
Control
Activate a peripheral and tell it what to do
Ex. Megnetic-tape rewind, forward…
Test
Test a various ststus conditions associated with an I/O module and its peripherals
Read
Obtain an item of data from the peripheral and place it in an internal buffer(Fig6.4 data register)
Write
Take an item of data(byte or word) from the data bus and transmit that data item to the peripherals

26. Tree Techniques for Input of a Block of Data
Programmed I/O

27. I/O Instructions Instruction are easily mapped into I/O commands
Programmed I/O
Instruction are easily mapped into I/O commands
Form of the instruction depends on the way external devices are
I/O devices is given a unique identifier or address

28. I/O Instructions Two modes of addressing Memory mapped I/O
Programmed I/O
Two modes of addressing
Memory mapped I/O
Single address space for memory locations and I/O devices
Same machine instruction to access both memory and I/O devices
Isolated I/O
Address space for I/O is isolated from memory
Need I/O or memory select lines
Special commands for I/O

29. Memory-Mapped and Isolated I/O
Programmed I/O

30. Interrupt-Driven I/O Problem of programmed I/O Alternative
Processor wait a long time for the I/O module of concern to be ready for either reception or transmission of data
Alternative
Processor issue an I/O command to a module and go on to do some other useful work
Interrupt the processor to request service when it is ready to exchange data with the processor
Execute data transfer and resume its former processing

31. Interrupt-Driven I/O
Interrupt-Driven I/O
Interrupt I/O is more efficient than programmed I/O because it eliminate needless waiting
Interrupt I/O still have much processor time

32. Simple Interrupt Processing
Interrupt-Driven I/O

33. Interrupt Processing Sequence of hardware events
Interrupt-Driven I/O
Sequence of hardware events
Device issues an interrupt signal to processor
Processor finish execution of execution of current instruction
Processor signals acknowledgment of interrupt
Processor push PSW and PC onto control stack
Processor loads new PC value based on interrupt
Save remainder of process state information
Process interrupt restore process state information
Restore process state information
Restore old PSW and PC

34. Design Issues
Interrupt-Driven I/O
How does the processor determine which device issued the interrupt
If multiple interrupts have occurred, how does the processor decide which one to process?
Four device identification
Multiple interrupt lines
Software poll
Daysy chain(hardware poll, vectored)
Bus arbitration(vectored)

35. Changes in Memory & Register
Interrupt-Driven I/O
(a) Interrupt occurs after instruction at location N

36. Changes in Memory & Register
Interrupt-Driven I/O
(b) Return from interrupt

37. Multiple Interrupt lines
Interrupt-Driven I/O
Most straightforward approach to the problem
Impractical to dedicate bus lines or processor pins to interrupt lines

38. Software Poll
Interrupt-Driven I/O
On interrupt, processor branchs to an interrupt-service routine which it is to poll each I/O module to determine which module caused the interrupt
Poll is in the form of a separate command line(TESTI/O)
Each l/O module contain an addressable status register
Read status register of each IO module to identify the interrupting module
Disadvantage is time consuming

39. Daisy Chain Hardware poll Vectored interrupt Vector
Interrupt-Driven I/O
Hardware poll
Vectored interrupt
Vector
A word on the data lines
Address of the I/O module or unique identifier
Processor use vector as a pointer to the appropriate device routine
Avoid the need to execute a general interrupt-service routine first

40. Bus Arbitration I/O module must first gain control of the bus
Interrupt-Driven I/O
I/O module must first gain control of the bus
One module can raise the line at a time
On interrupt, it respond on the interrupt ack line
Requesting module place its vector on the data lines

41. Intel 82C59A Interrupt Controller
Interrupt-Driven I/O
Intel provide a single interrupt request(INTR) and single ack(INTA)
External interrupt arbiter, 82C59A
82C59A manage interrupt
Interrupt mode
Fully nested
Interrupt request are ordered in priority from 0(IR0) through 7(IR7)
Rotating
Lowest priority in the group
Special mask
Processor inhibit interrupt from certain devices

42. 82C59A Interrupt Controller
Interrupt-Driven I/O

43. Intel 82C55A
Interrupt-Driven I/O
General-purpose I/O module designed for use with the Intel processor
Next page Fig 6.10

44. Intel 82C55A
Interrupt-Driven I/O

45. Keyboard/Display Interface
Interrupt-Driven I/O

46. Drawbacks of I/O
Direct memory access
Processor intervene in data transfer between memory and an I/O module
Inherent drawback
I/O transfer rate is limited
Processor is tied up in managing an I/O transfer
More efficient technique is required:
Direct memory access(DMA)

47. DMA Block Diagram
Direct memory access

48. DMA Function DMA involves an additional module on system bus
Direct memory access
DMA involves an additional module on system bus
DMA module take over control of the system from processor
Cycle stealing
DMA module in effect steals a bus cycle

49. DMA Function
Direct memory access
Issue a command to the DMA module, by sending to the DMA module the following information
Whether a read or write is requested, using the read or write control line between the processor and the DMA module
Address of I/O device involved, communicated on the data lines
Starting location in memory to read from or write to, communicated on the data lines and stored by the DMA module in its address register
The number of words to be read or written, again communicated via the data lines and stored in the data count register

50. DMA Function DMA module transfer the entire block of data,
Direct memory access
DMA module transfer the entire block of data,
One word at a time
Directly to or from memory
Without going through the processor
When transfer complete, DMA module sends an interrupts signal to processor
Processor is involved only at the beginning and end of the transfer

51. DMA & Interrupt Break point
Direct memory access

52. Alternative DMA Configuration
Direct memory access
Single-Bus, Detached DMA

53. Alternative DMA Configuration
Direct memory access
Single-Bus, Integrated DMA-I/O

54. Alternative DMA Configuration
Direct memory access
I/O Bus

55. The evolution of the I/O Functions
I/O Channels & Processors
Evolutionary step
CPU directly controls a peripheral device
Controller or I/O module is added
Same configurations is used, but now interrupts are employed
I/O module is given direct access to memory via DMA
I/O module is enhanced to become a processor in its own right, with a specialized instruction set tailored for I/O (I/O channel)
I/O module has a local memory of its own and is a computer in its own right (I/O processor)

56. The evolution of the I/O Functions
I/O Channels & Processors
More and more of the I/O function is performed without CPU involvement

57. Characteristics of I/O Channels
I/O Channels & Processors
I/O channel an extension of DMA concept
I/O channel has the ability to execute I/O instruction
CPU does not execute I/O instruction
Two type of I/O channel
Selector channel
Control multiple high-speed devices
Transfer of data with one of those devices
Multiplexor channel
Handle I/O with multiple devices at the same time

58. I/O Channel Architecture
I/O Channels & Processors
(a)Selector

59. I/O Channel Architecture
I/O Channels & Processors
(b)Multiplexor

60. Type of Interface Parallel interface Serial interface
External Interface: SCSI and FireWire
Parallel interface
Multiple line connecting the I/O module and the peripheral
Multiple bits transferred simultaneously
Used for higher speed peripherals(tape,disk)
Serial interface
One line used to transmit data
Bits must be transmitted one at a time
Printer, terminals

61. Dialogue for a Write Operation
External Interface: SCSI and FireWire
I/O module send a control signal
Peripheral acknowledges the request
I/O module transfer data
Peripheral acknowledges receipt of the data
(read operation proceeds similary)

62. Parallel and Serial I/O
External Interface: SCSI and FireWire

63. Point-to-Point & Multipoint
External Interface: SCSI and FireWire
Point-to-point
Dedicated line between I/O module and external device
On small system(PC), include keyboard, printer, external modem
Multipoint
Used to support external mass storage devices(disk, type) and multimedia devices(CD-ROM,video)

64. Small Computer Interface
External Interface: SCSI and FireWire
SCSI
Popularized in the Macintosh in 1984
Now widely used on Mac, Windows/Intel system, workstation
SCSI Version
SCSI-1 :
8 data lines and operate at a clock speed of 5MHz of a data rate of 5 Mbytes/s
SCSI-2 :
Optional expansion of the data lines to and increase of the clock speed to 10 MHz
Maximum data rate of 20 or 40 Mbytes/s

65. Signals and Phases Bus Free Arbitration Selection Reselection Command
External Interface: SCSI and FireWire
Bus Free
No device is using the bus
Arbitration
Enable one device to gain control of the bus
Selection
Enable an initiator to select a target to perform a funcion
Reselection
Enable a target to reconnect to an initiator to resume an operation
Command
Enable target to request the command information

66. Signals and Phases Data Status Message
External Interface: SCSI and FireWire
Data
Enable the target to request the transfer of data
Status
Enable the target to request that status information be sent from the target to the initiator
Message
Enable the target to request the transfer of one or more messages

67. SCSI Bus Phases
External Interface: SCSI and FireWire

68. SCSI Control Lines BSY SEL C/D I/O MSG Set to indicate the bus is busy
External Interface: SCSI and FireWire
BSY
Set to indicate the bus is busy
SEL
Select a target to perform a command
C/D
Indicate whether data on the data bus is Control or Data information
I/O
Control the direction of data movement
MSG
Indicate to the initiator that the information being trasferred is a message

69. SCSI Control Lines REQ ACK ATN RST Request a data information transfer
External Interface: SCSI and FireWire
REQ
Request a data information transfer
ACK
Acknowkedge a REQ from traget
ATN
Inform the target that it has a message available for transfer
RST
Used to reset the bus

70. SCSI Bus Signals
External Interface: SCSI and FireWire

71. SCSI Timing Diagram
External Interface: SCSI and FireWire

72. Messages Command complete Disconnect Initiator Detected Error Abort
External Interface: SCSI and FireWire
Command complete
Disconnect
Initiator Detected Error
Abort
Sent from initiator to the target to clear the present operation
Synchronous Data Transfer
Exchanged between initiator and target to establish synchronous data transfer

73. Commands Steps for execution of command Fields of CDB
External Interface: SCSI and FireWire
Steps for execution of command
Target acquires and decides command information
Data is transferred to or from the target
Target generates and returns status information
Fields of CDB
Operation code
Logical unit number
Logical block address
Transfer length
Parameter list length
Allocation length
Control

74. SCSI Command Block Format
External Interface: SCSI and FireWire

75. Commands Mandatory Inquiry Request Sense Send Diagnostic
External Interface: SCSI and FireWire
Mandatory
Inquiry
Request Sense
Send Diagnostic
Test unit ready

76. Fire Wire Serial Bus FireWire Advantages
External Interface: SCSI and FireWire
FireWire
IEEE standard 1394, for a high-performance serial bus
Advantages
High speed
Low cost
Easy to implement

77. Fire Wire Serial Bus
External Interface: SCSI and FireWire
Use serial transmission (bit at a time) rather than parallel
Computers are getting physically smaller
Provide a single I/O interface with a simple connector
User can reach behind the machine and plug it in without looking

78. FireWire Configurations
External Interface: SCSI and FireWire
Use a daisy chain
Provide for what is known as hot plugging
With SCSI, both ends of the bus must have terminators and each device must be assigned a unique address as part of the configuration
No terminators

79. FireWire Configurations
External Interface: SCSI and FireWire
System automatically perform a configuration function to assign addresses
Tree structured configuration is possible
Three layer of the stack
Physical layer
Link layer
Transaction layer

80. Comparison of SCSI&FireWire
External Interface: SCSI and FireWire

81. Physical layer
External Interface: SCSI and FireWire
Several alternative transmission media and their connectors
Tree structured arrangement of the node

82. FireWire Protocol Stack
External Interface: SCSI and FireWire

83. Link Layer Tow type of transmission Subaction’s five time period
External Interface: SCSI and FireWire
Tow type of transmission
Asynchronous
Isochronous
Subaction’s five time period
Arbitration sequence
Packet transmission
Acknowledgement gap
Acknowledgment
Subaction gap

84. FireWire Subactions
External Interface: SCSI and FireWire