1. Logic Families and Their Characteristics
Chapter 9
Logic Families and Their Characteristics 1

2. Objectives You should be able to:
Analyze internal circuitry of a TTL NAND gate for both HIGH and LOW output states.
Determine IC input and output voltage and current ratings from the manufacturer’s data manual.
Explain gate loading, fan-out, noise margin, and time parameters. 2

3. Objectives (Continued)
Design wired-output circuits using open-collector TTL gates.
Discuss the differences and proper use of the various subfamilies within both TTL and CMOS ICs.
Describe the reasoning and various techniques for interfacing among the TTL, CMOS, and ECL families of ICs. 3

4. Digital Logic Families
Three commonly used families:
TTL (transistor-transistor logic)
CMOS (complementary metal oxide semiconductor)
ECL (emitter-coupled logic)
Subfamilies within each family
Different speed, power consumption, voltage and current levels, and temperature ranges
There are standardized numbering schemes but prefixes may differ

5. The TTL Family NPN bipolar transistor Physical model Schematic symbol
Diode equivalent 4

6. The TTL Family Two-input NAND gate Multi-emitter transistor
Totem-pole output stage
HIGH level output typically 3.4 V
LOW level output typically 0.3 V 5

7. The TTL Family
7400 two-input NAND gate 6

8. TTL Voltage and Current Ratings
Input/output current
Source current – IOH
Sink current – IOL
Low-level input current – IIL
High level input current – IIH 7

9. TTL Voltage and Current Ratings
Fan-out is the number of gate inputs of the same sub-family that a single output can drive.
The IOH rating must be less-than or equal-to the sum of all IHS ratings. 7

10. TTL Voltage and Current Ratings
Example of TTL gate sinking input currents from two gate inputs using logic symbols 8

11. TTL Voltage and Current Ratings
Example of TTL gate sinking input currents from two gate inputs using schematic symbols 9

12. TTL Voltage and Current Ratings
Example of TTL gate sourcing current to two gate inputs using logic symbols 10

13. TTL Voltage and Current Ratings
Example of TTL gate sourcing current to two gate inputs using schematic symbols 11

14. TTL Voltage and Current Ratings
Summary of I/O current and fan-out:
Low-level input current IIL = -1.6 mA (-1600 μA)
High level input current IIH = 40 μA
(The minus sign indicates current leaving the gate)
IOL – low-level output current = 16 mA (16,000 μA)
IOH – high-level output current = -400 μA (-800 μA for some)
Fan-out is max number of gate inputs that can be connected to a standard TTL gate output.
Typically fan-out = 10.
Note: Current ratings are not the amount of current, but the maximum current capability. 12

15. TTL Voltage and Current Ratings
Input/Output Voltages (graphical representation) 14

16. Noise Margin
Noise margin: The difference between high level voltages and low level voltages 13

17. TTL Voltage and Current Ratings
Input/Output Voltages and noise margin 14

18. Discussion Point
Locate the voltage and current ratings covered so far on the following typical data sheet (Figure 9.8). 16

19. 17

20. 18

21. 19

22. Pulse-Time Parameters
Rise Time (tr) – Measured from 10% level to 90% level
Fall Time (tf) – Measured from 90% level to 10% level 20

23. Propagation Delay Propagation Delay (tPLH and tPHL)
Determined by transistor switching speed 22

24. Power Dissipation
Total power supplied to the IC power supply terminals
Assume 50% duty cycle.
PD = VCC x ICC(av) 23

25. Open-Collector Outputs
Upper transistor is removed
Can sink current but cannot source current

26. Open-Collector Outputs
To get a TTL OC output or a CMOS OD output to produce a HIGH, a pull-up resistor is required.

27. Wired-output operation
Outputs from two or more gates tied together
Wired-AND logic 24

28. Other TTL Considerations
Disposition of unused inputs and unused gates:
Open inputs degrade noise immunity
AND and NAND – tied HIGH
OR and NOR – tied to ground
Unused gates – force outputs HIGH 25

29. Other TTL Considerations
Power supply decoupling
TTL logic tends to produce spikes on the VCC line
Connecting a 0.01 to 0.1 F capacitor between VCC and ground pins
Reduces EMI radiation
Reduces effect of voltage spikes from power supply
Should installed close to the IC 26

30. Improved TTL Series 74HXX series 74LXX series
Half the propagation delay
Double the power consumption
74LXX series
Twice the propagation delay
Half the power consumption
In both cases the speed-power product remained about the same.
In most cases both have been replaced by Schottky TTL and CMOS. 27

31. Schottky TTL
Main speed limitation of standard TTL is due to capacitive charge in transistor base.
Charge is stored when saturated
74SXX TTL series adds a Schottky diode between the base and collector. 27

32. Schottky TTL Lower-power Schottky (LS)
Power consumption significantly reduced
Speed-power product 1/3 of 74SXX series and 1/5 of 74XX series
Advanced low-power Schottky (ALS)
Propagation delay dropped from 9 to 4 ns
Power dissipation from 2 to 1 mW per gate
More expensive
Fast (F)
Propagation lowered to under 3 ns.
Device size dramatically reduced 27

33. The CMOS Family MOSFETs
Metal oxide semiconductor field-effect transistors
High input impedance and low power dissipation 28

34. The CMOS Family N-Channel MOSFET P-channel MOSFET
Built on P material
Normally OFF
Positive gate voltage induces the N-channel
P-channel MOSFET
Channel is formed by a positive gate voltage
Three major MOS families
PMOS: P-channel
NMOS: N-channel
CMOS: Complimentary P- and N-channel 30

35. The CMOS Family
CMOS inverter formed from N-and P-channel MOSFETS. 30

36. Other CMOS Gates 30

37. Handling CMOS devices Avoid electrostatic discharge
Ground work station, test equipment and soldering irons
Wear a wrist strap
Don’t connect input signals with power off
Connected unused inputs to VDD
Don’t remove IC with power on 30

38. CMOS Availability 4000 series - original CMOS line
40H00 series - faster
74C00 series - pin compatible with TTL
74HC00 and 74HCT00 series
Speedy, less power, pin compatible, greater noise immunity and temperature operating range 30

39. CMOS Availability 74- BiCMOS series - low power and high speed
74-Low Voltage series
See appendix B
Nominal supply voltage of 3.3 V
74AHC and 74AHCT series
Superior speed
Low power consumption
High output drive current 31

40. CMOS Availability 74AVC advanced very-low-voltage CMOS logic
Faster speed (maximum 2 ns)
Very low operating voltages
3.3 V, 2.5 V, 1.8 V, 1.5 V and 1.2 V
Dynamic output control
Adjusts output impedance to minimize overshoot and undershoot 32

41. Emitter-Coupled Logic (ECL)
Extremely fast
Increased power dissipation
Uses differential amplifiers
Figure 9-22 33

42. Developing Technologies
Newer technologies
Integrated injection logic (I2L)
Silicon-on-sapphire (SOS)
Gallium arsenide (GaAs)
Josephson junction circuits
In all cases the goal is higher frequencies and increased density. 34

43. Comparing Logic Families
Performance specifications 35

44. Comparing Logic Families
Propagation delay versus power 36

45. Comparing Logic Families
Power supply current versus frequency 37

46. Interfacing Logic Families
TTL to CMOS 38

47. Interfacing Logic Families
TTL to CMOS
Pull-up resistor 39

48. Interfacing Logic Families
CMOS to TTL 40

49. Interfacing Logic Families
CMOS to TTL 41

50. Interfacing Logic Families42

51. Interfacing Logic Families
Level Shifting
Level-shifter IC: B 43

52. Interfacing Logic Families
Level Shifting
Level-shifter IC: B 44

53. Interfacing Logic Families
ECL Interfacing 45

54. FPGA Electrical Characteristics
Each manufacturer of PLDs has different electrical characteristics.
Set the VCCIO to the required voltage for the input/output ports

55. FPGA Electrical Characteristics
You must also make appropriate changes to the sink and source current ratings.
IOL and IOH are changed under program control
Range from 2 mA to 24 mA
Called Programmable Drive Strength

56. Summary
There are three stages of internal circuitry in a TTL IC: input, control, and output.
The input current to an IC gate is a constant value specified by the manufacturer.
The output current of an IC gate depends on the size of the load connected to it. Its value cannot exceed the maximum rating of the chip, IOL or IOH. 47

57. Summary
The HIGH- and LOW-level output voltages of the standard TTL family are not 5 V and 0 V but typically are 3.4 V and 0.2 V.
The propagation delay is the length of time that it takes for the output of a gate to respond to a stimulus at its input.
The rise and fall times of a pulse describe how long it takes for the voltage to travel between its 10% and 90% levels. 48

58. Summary
Open-collector outputs are required whenever logic outputs are connected to a common point.
Several improved TTL families are available and continue to be introduced each year providing decreased power consumption and decreased propagation delay. 49

59. Summary
The CMOS family uses complementary metal oxide semiconductor transistors instead of the bipolar transistors used in TTL ICs. Traditionally, the CMOS family consumed less power but was slower than TTL. However, recent advances in both technologies have narrowed the differences. 50

60. Summary
The BiCMOS family combines the best characteristics of bipolar technology and CMOS technology to provide logic functions that are optimized for the high-speed, low-power characteristics required in microprocessor systems. 51

61. Summary
Emitter-coupled logic (ECL) provides the highest-speed ICs. Its drawback is its very high power consumption.
A figure of merit of IC families is the product of their propagation delay and power consumption, called the speed-power product (the lower, the better). 52

62. Summary
When interfacing logic families, several considerations must be made. The output voltage level of one family must be high and low enough to meet the input requirements of the receiving family. Also, the output current capability of the driving gate must be high enough for the input draw of the receiving gate or gates. 53