3. F-14 “Tomcat” Microprocessor Chip Set Ray Holt ©Copyright 1998-2011 Ray M. Holt ALL RIGHTS RESERVED

4. Available Documents FirstMicroprocessor.com First revealed in 1998 (30 year secret) Design notebook (excerpts) This slide show Original design paper – 1971 (approved by IEEE Computer Design Magazine in 1970) “Analysis” paper – 1998 Wall Street Journal article Electronic Business article Smithsonian Museum Air & Space Magazine “From Dust to the Nano Age” Leo Sorge

5. Technology Education in Rural Mississippi Robotics Web Page Design Intro to Logic Design Intro to Computers PowerPoint 37 students Ages 10 -17 Mt Olive, MS

6. Mississippi Rural Education Consortium Started Statewide in 2010 28 university professors & rural educators Robotics & Engineering Education/Research Center Reduce dropout rate Increase ACT test scores Increase college attendance Motivate new engineers

7. Forestry to Cal Poly University of Idaho Forestry Major & R.O.T.C. Army Ranger Unit Junior ready to graduate – took Physics of Electricity at Dean's request

8. Forestry to Cal Poly Cal Poly Pomona Electronic Engineering Major Tubes to transitors Junior year: took Switching Theory as elective

9. Cal Poly to F-14 Garrett AiResearch Engineering Hired to design amplifiers for aircraft audio Only one in department with computer class Special project: Mechanical – Electronic Computer

10. Microcomputer History 2000's Multi-core processors Flash drives Terabyte portable drives USB interface everywhere ipod/ipad type devices Smart phones: email, internet, wifi, hot spots, apps

11. Microcomputer History 1990's Embedded processors Pentiums 100Mhz – 3Ghz+ 486’s 30Mhz – 100Mhz 386 10Mhz – 50Mhz Windows MS Office (Word, PowerPoint, etc.)

12. Microcomputer History 1980’s 286’s 4Mhz – 20Mhz IBM PC introduced (1981) Time “Man of the Year” DOS Operating System Wordstar Word Processor Lotus 1-2-3 Spreadsheet

13. Microcomputer History 1970’s 1977 - Radio Shack TRS-80 1977 - Commodore Pet 1977 - Apple I / KIM / SYM 1975 - Intel 8080 CPU 1975 - Microsoft Basic / Altair / Jolt 1973 - CP/M Operating System 1972 - Intel 4004 CPU

14. Microcomputer History 1968 Apollo 7 & 8 Launched Intel Founded IBM 8” Floppy Drive Bill Gates turned 13 F-14 Microprocessor design started

15. Make A New Integrated Circuit Computer From A Electromechanical Computer The Big Challenge

16. F4 Phantom CADC

17. United States Navy F-14 “Tomcat” Fighter jet

18. Companies Involved Prime Contractor: Grumman Aircraft SubContractor: Garrett AiResearch Integrated Circuits: American MicroSystems

19. The Team 2 – Computer Logic Designers 3 – High-level Programmers 4 – Analog Designers 1 – Mathematician 1 – Test / Mfg Engineer 3 – Electronic Technicians 2 – Draftsmen 4 – Managers 5 – Integrated Circuit Engineers (American MicroSystems)

20. What Did We Do? Designed and Developed A Central Air Data Computer (CADC)

21. Started: June 1968 Completed: June 1970 1st Flight: Dec 21, 1970 Design Time Frame

22. 1st Flight December 21, 1970

23. F-14 “Tom Cat” CADC Dual Redundant 2 - computers 2 - power supplies 4 - quartz sensors 2 - sets A/D and D/A

24. F-14 Aircraft Incentive / Penalties $440,000 each 100 lbs overweight $440,000 for each second slow $1M for each 10 miles short escort radius $1M for each knot fast on carrier landing $450,000 for each extra maintenance hour $5,000 for each day late

25. F-14 Aircraft Successes on time on cost under weight - 6/10th of one percent better performance than expected 1st flight one month ahead of schedule demonstrated operational in 1/2 the time 712 F-14’s made, 478 (F-14A’s, 100-Iran)

26. Computer (CADC) Design Constraints Size: 40 sq inches for microprocessor Power: 10 watts Cost: $3,000-$5,000 Temperature: -55 to +125 deg C Provide data for control & firing of 6 Phoenix / Sidewinder missiles at the same time Others: Acceleration, mechanical shock, reliability, project schedule

27. F-14 In-Flight Three minute YouTube Video http://www.youtube.com/watch?v=yhyprrof0JM Observe the various positions of the wings. They are 100% computer controlled. Observe the dynamic flow of air across the plane. The computer is constantly correcting for stability. When there is a cloud formation around the plane it is breaking the sound barrier (the Danger Zone)

28. What Is A C.A.D.C.? A Flight Computer to: compute and display – altitude – air speed – vertical speed – mach number – temperature

29. A Flight Computer to: compute and control – wing speed, position, and rate – maneuver flap position – glove vane position – angle of attack correction

30. A Flight Computer to: provide other critical flight information – real-time data to other systems (weapons and communications) – in-flight self-diagnostics – redundant switchover to dual system

31. State-of-the-Art in 1968? The Technology TTL Bipolar - high power MOS logic modules - too many packages LSI - new, not proven

32. CADC Block Diagram

33. Microprocessor Arithmetic Functions Arithmetic functions Logical functions Inputs (switches, A/D’s) Outputs (lights, D/A’s) Self Test Diagnostics

34. Microprocessor Self Test Functions In-Flight Diagnostics – 100% of all connections/data paths – 100% of all ROM bits – 100% non-arithmetic circuits – 98% all arithmetic unit single failures – dual redundant system – pilot notification

35. Required Arithmetic Calculations 6th Order Polynomials F (x) = a 6 x 6 +a 5 x 5 +a 4 x 4 +a 3 x 3 +a 2 x 2 +a 1 x 1 +a 0 x = input from sensors or stored values We implemented using Horner’s Rule F (x) = (- - - ((a 0 x + a 1 ) x + a 2 ) x + - - -

36. Microprocessor Data Structure Number System fractional fixed point computation two’s complement arithmetic 20 bit data length (based on flight requirements)

37. Microprocessor Technology high level of integration - P Channel MOS minimum package and lead count lowest possible power mil spec temp range -55C to +125C

38. Microprocessor Design Decisions serial instruction and data transfer distributive instruction command ‘pipeline’ instruction and arithmetic ROM master/slave instructions ROM built-in counter and conditional jump

39. Microprocessor F-14 System Diagram

40. Microprocessor System Timing 375Khz Clock, 2.66 us bit time One word = 20 bit times or 53.3 us Operation time - two words 512 Op times - computational Cycle 18.3 Cycles per second 9370 Op times per second for each computational unit

41. Microprocessor Functional Units Parallel Multiplier Unit (PMU) Parallel Divider Unit (PDU) Special Logic Function (SLF) Data Steering Unit (SLU) Random Access Storage (RAS) Read-Only Memory Unit (ROM)

42. Computational Requirements Req/Sec Max/CU Multiply (20-bit) 5490 9370 Divide (20-bit) 1922 9370 Add/Sub (20-bit) 293 9370 Limits Comparisons 1373 9370 Square Roots 73 * Logical And/Or 26 * IF Transfers 729370 Discrete inputs/output 842 9370 A/D and D/A I/O 695 9370

43. Microprocessor Chip Set PMU Functions 20-bit parallel multiplier three internal storage registers ‘pipelined’ overlap I/O and operation Booth’s multiply algorithm 53.3 μs multiply / 53.3 μs transfer continuous operation

44. PMUPMU

45. Microprocessor Chip Set PDU Functions 20-bit parallel divider three internal storage registers ‘pipelined’ overlap I/O and operation Non-restoring division algorithm 53.3 μs divide / 53.3 μs transfer continuous operation

46. PDUPDU

47. Microprocessor Chip Set SLF Functions logical and arithmetic operations Gray code conversions three internal storage registers ‘pipelined’ overlap I/O and operation 53.3 μs multiply / 53.3 μs transfer 4-bit instruction word

48. SLFSLF

49. Microprocessor Chip Set SLU Functions three channel digital data multiplexer 16 inputs - 3 channels out four inputs combined for arithmetic operations 53.3 μs operation / 53.3 μs command 15-bit instruction word

50. SLUSLU

51. Microprocessor Chip Set RAS Functions sixteen 20-bit static registers random access read-write storage 53.3 μs I/O time 5-bit instruction word

52. RASRAS

53. Microprocessor Chip Set ROM Functions 2560-bit random access/sequential access fixed memory - 128 words x 20-bits can parallel eight ROM’s for 1024 words program counter - cleared / +- increment / hold / external data out / parity out 20-bit instruction word

54. ROMROM

55. Microprocessor Technology Spec’s CHIP DEVICES SIZE PKG # USED TOTAL PMU 1063 150 x 153 24 pin 1 1063 PDU 1241 141 x 151 24 pin 1 1241 SLF 743 120 x 130 24 pin 1 743 SLU 771 128 x 133 24 pin 3 2313 RAS 2330 115 x 130 14 pin 3 6990 ROM 3268 143 x 150 14 pin 19 62092 TOTAL 28 74442

56. PMU PDU SLF SLU RAS ROM

57. Microprocessor Instruction Set PMU - continuous - co-processor PDU - continuous - co-processor SLF - 16 instructions SLU - 48 instructions RAS - 32 instructions Executive ROM - 37 instructions TOTAL = 133 instructions

58. Microprocessor Equations - Angle of Attack

59. Microprocessor Numeric Scaling - Angle of Attack

60. Microprocessor Equation Flow - Angle of Attack

61. Microprocessor Program Flow - Angle of Attack

62. Microprocessor Typical Binary Coding Sheet

63. Microprocessor Initial Programming Aids No assembler No compiler No simulator No debugger No hardware prototype

64. Microprocessor Testing/Computer Aids Failure analysis simulation (circuit logic level simulation) Programming simulation (chip level with timing) Card deck for ROM masking Program flow chart Flight test software changes Hardware prototype for real testing

65. Simulator/Debugger Output Values Report

66. ROM Binary Programming Report

67. Program Flowchart Report from Plotter

68. Hardware Prototype of F-14 CADC

69. Simulated Pilot Display from CADC

70. General Design Accomplishments 1 st microprocessor chip set 1 st aerospace microprocessor 1 st fly-by-wire flight computer 1 st military microprocessor 1 st production microprocessor 1 st fully integrated chip set microprocessor 1 st 20-bit microprocessor

71. Specific Design Accomplishments 1 st microprocessor with built-in programmed self- test and redundancy 1 st microprocessor in a digital signal (DSP) app 1 st with execution pipeline 1 st with parallel processing 1 st integrated math co-processors 1 st Read-Only Memory (ROM) with a built-in counter

72. 1970 - 2006 F-14 “Tomcat”

75. F14 “TomCat” In Flight Navy information film “Top Gun” movie

76. LSI Comments - The Experts May 1967 Jack Fischel Oct 1967 Joseph Earl Oct 1967 Saul Levy Nov 1968 CG Feth 1968 Franz Alt

77. Microprocessor Logical Functions Data Limit Comparison Select P if U >= P >= L Select L if P > L Select L if P < L

78. Microprocessor Logical Functions Logical – and – or – conditional transfer – unconditional transfer

79. Microprocessor I/O Functions Input / Output – receive on/off switch information – receive A/D information – output on/off information – output D/A information

80. Who Did It? Garrett AiResearch –Electronic Systems, Torrance, CA American Micro Systems, Inc. –Santa Clara, CA

81. What Is A CADC? A Flight Computer to: compute and display – altitude – air speed – vertical speed – mach number – temperature

82. A Flight Computer to: compute and control – wing speed, position, and rate – maneuver flap position – glove vane position – angle of attack correction

83. A Flight Computer to: provide other critical flight information – real-time data to other systems – in-flight self-diagnostics – redundant switchover to dual system

84. Microprocessor General System Diagram

85. Microprocessor Data Functions Data Conditioning & Scaling A +/- B F = ----------- C A - B F = ----------- A + C

86. What Is A CADC? A Flight Computer to: Real-time computing and display Real-time computing and control Real-time flight data to other systems: weapons & communications

87. F14 Aircraft Requirements two man crew two engines advanced weapon system internal gun land on aircraft carrier fully loaded

88. ‘pipeline’ instruction and arithmetic master/slave instruction ROM’s ROM retain mode ROM external conditional jump

89. Microprocessor Numeric Scaling - Angle of Attack

90. Dual Quartz Sensors

91. Microprocessor Chip Prototype

92. Final Test The Ultimate Extreme Test of a Computer and Aircraft

93. Breaking The Sound Barrier - Twice MACH 2