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CMOS Analog Design Using All-Region MOSFET Modeling 1 Chapter 6 Current Sources and Voltage References.

Published byDortha O’Brien’ Modified over 9 years ago

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Presentation on theme: "CMOS Analog Design Using All-Region MOSFET Modeling 1 Chapter 6 Current Sources and Voltage References."— Presentation transcript:

1 CMOS Analog Design Using All-Region MOSFET Modeling 1 Chapter 6 Current Sources and Voltage References

2 CMOS Analog Design Using All-Region MOSFET Modeling 2 Simple MOS current source (a) A simple MOS current source (b) Current x voltage characteristic of the input transistor and load line. I REF is, in general, very sensitive to V DD, R, and M Low current requires high R (large silicon area)

3 CMOS Analog Design Using All-Region MOSFET Modeling 3 Widlar current source Low current can be generated without large resistances N is also a design parameter (more important than R S ) Input current I REF often high – not convenient for low-power design

4 CMOS Analog Design Using All-Region MOSFET Modeling 4 Self-biased current source - 1 weak inversion strong inversion

5 CMOS Analog Design Using All-Region MOSFET Modeling 5 I1I1 I2I2 I 2 =I 1 Current mirror M 3 -M 4 Current mirror M 1 -M 2 -R S Point A Point B Start-up circuit: ensures that A is the solution; “wakes-up” current source ASAP after power-up Self-biased current source - 2

6 CMOS Analog Design Using All-Region MOSFET Modeling 6 MOSFET-only self-biased current source, J=S 5 S 7 /S 4 S 6

7 CMOS Analog Design Using All-Region MOSFET Modeling 7 Bandgap voltage reference – 1 Choose M such that The output voltage for zero temperature coefficient is close to the “extrapolated” band-gap voltage of Si (1.206 V) T V BE ~ -2 mV/ o C T k/q=+ 86.19  V/ o C tt V CC  t generator  tt MtMt + V BE - M I1I1

8 CMOS Analog Design Using All-Region MOSFET Modeling 8 T Bandgap voltage reference – 2

9 CMOS Analog Design Using All-Region MOSFET Modeling 9 E G:  1.206 eV, silicon bandgap extrapolated to 0 K. Assume the average mobility of electrons in the base region is The temperature coefficient of the voltage reference is Assume that =0 at T=T 0 Bandgap voltage reference – 3

10 CMOS Analog Design Using All-Region MOSFET Modeling 10 CMOS-compatible bandgap reference - 1 Problem: n=n(T, V G ) Minimum supply: V BE +V 1 +V DSsat (current source) Both M 1 and M 2 in weak inversion

11 CMOS Analog Design Using All-Region MOSFET Modeling 11 CMOS-compatible bandgap reference - 2 PTAT voltage generator. Transistors M 1 and M 3 are biased in weak inversion.

12 CMOS Analog Design Using All-Region MOSFET Modeling 12 CMOS-compatible bandgap reference - 3 V CC + V BE1 - I1I1 V CC + V BE2 - I2I2

13 CMOS Analog Design Using All-Region MOSFET Modeling 13 CMOS-compatible bandgap reference - 4 Problems:  Op amp offset voltage  Poor performance of substrate pnp transistors ??

14 CMOS Analog Design Using All-Region MOSFET Modeling 14 Exercise Band-gap reference in n-well CMOS Vertical (substrate) pnp transistors Exercise: Show that Source of error

15 CMOS Analog Design Using All-Region MOSFET Modeling 15 CMOS-compatible bandgap reference - 5 VFCM VFCM: voltage following current mirror

16 CMOS Analog Design Using All-Region MOSFET Modeling 16 Eric A. Vittoz, MOS Transistors Operated in the Lateral Bipolar Mode and Their Application in CMOS Technology, IEEE JSSC, Vol. 18, no. 3, pp. 273-279, June 1983 p-well CMOS process CMOS-compatible bandgap reference - 6

17 CMOS Analog Design Using All-Region MOSFET Modeling 17 CMOS bandgap reference with sub-1-V operation V DD M3M3 M1M1 M2M2 R1R1 1 Q1Q1 N I 1a R2R2 V REF Q2Q2 + R2R2 R3R3 I 2a I 1b I 2b I1I1 I2I2 I3I3 I 1 =I 2 =I 3 -

18 CMOS Analog Design Using All-Region MOSFET Modeling 18 Design of a SBCS – 1 Applying UICM to both M1 & M2 Sat. Triode SELF-CASCODE MOSFET (SCM)

19 CMOS Analog Design Using All-Region MOSFET Modeling 19 IXIX IXIX 2IX2IX IXIX IXIX 2IX2IX SCM 1,2 SCM 3,4 Design of a SBCS – 2

20 CMOS Analog Design Using All-Region MOSFET Modeling 20 VOLTAGE FOLLOWING (NMOS) CURRENT MIRROR (PMOS) 1 When both M 8 & M 9 operate in WI: Design of a SBCS – 3

21 CMOS Analog Design Using All-Region MOSFET Modeling 21 A self-biased current source VxVx VFCM VxVx Design of a SBCS – 4

22 CMOS Analog Design Using All-Region MOSFET Modeling 22 VFCM M 1 &M 2 in MI: i f2 = 10 S 2 = S 1, N = 1 Let us choose M 3 &M 4 in WI: i f3(4) <<1 Output current: I ref =10 nA I SHn-channel  100 nA, I SHp-channel  40 nA =1 =10 nA Let us choose i f3 =0.187  Design of a SBCS – 5

23 CMOS Analog Design Using All-Region MOSFET Modeling 23 Sifif irir M1M1 0.01100 M2M2 0.013010 M3M3 1.130.1870.01 M4M4 100.010 M 8, M 8(a) 10. 10 M 9, M 9(a) 10. 10 M P (all)2.50.10 VFCM =1 =10 nA Summary Design of a SBCS – 6

24 CMOS Analog Design Using All-Region MOSFET Modeling 24 Design of a SBCS – 7

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