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Complex interlaced infrastructure - onboard testing: how much real scale testing should be needed? 11th UIC ERTMS Conference, Istanbula 1-3 April 2014.

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Presentation on theme: "Complex interlaced infrastructure - onboard testing: how much real scale testing should be needed? 11th UIC ERTMS Conference, Istanbula 1-3 April 2014."— Presentation transcript:

1 Complex interlaced infrastructure - onboard testing: how much real scale testing should be needed?
11th UIC ERTMS Conference, Istanbula 1-3 April 2014

2 Laboratory Validation Operational scenarios
Current situation: Positive messages UIC ERTMS Atlas 2012 ERTMS will be deployed in European core and comprehensive corridors 2 ERTMS will be the worldwide standard for rail signaling for the next decades 1 Laboratory Validation & Operational scenarios Baseline 2 (2.3.0.d) is an stable version in successful commercial operation in many European and non-European countries (Spain, Italy, Switzerland, The Netherlands, China….) Baseline 3 has been already published into the TSI (3.3.0) and it includes some added functionality (braking curves, crossing level, limited supervision…) as well as bugs debugging. ERTMS Specifications are stable enough and properly managed by ERA 3 Baseline 2 (2.3.0.d) is an stable version in successful commercial operation in many European and non-European countries (Spain, Italy, Switzerland, The Netherlands, China….) Baseline 3 has been already published into the TSI(3.3.0) and it includes some added functionality (braking curves, crossing level, limited supervision…) as well as bugs debugging.

3 Main pending challenges: time and money
Increase market scale ERTMS costs are too high 1 Increase competition (multiple suppliers) Increase system complexity Very high deployment costs (tests on track) Operational and train-track integration tests on lab: Reduce time Reduce cost Increase system reliability Advance “last minute problems” (always appeared in the signaling world). Too long process to place in service 2

4 ERTMS works!!! ERTMS reliability and punctuality in Madrid-Barcelona HSL Kms between incidences * L2 started in October 2011 ** Line was extended in L1 up to Barcelona *** Line was extended in L1 up to French border Punctuality (delay <5’)

5 SYSTEM AUTHORITY AND INTEROPERABILITY (IOP) TESTS
3. How to solve interoperability problems before placing in service a new line? SYSTEM AUTHORITY AND INTEROPERABILITY (IOP) TESTS Within the new European frame where the operators and infrastructure are separated, it is essential the existence of a System Authority to manage the solution of interoperability problems. MFOM has played this role in the Spanish ERTMS projects. The group led by MFOM (ADIF, RENFE, CEDEX and INECO) has created the validation procedure that allows the opening of railway lines with full warranties of interoperability. Operational and train –track integration TESTS IOP TESTS NATIONAL AUTHORITY: Ministry of Fomento (Public Works) Independent Assesment INFRASTRUCTURE MANAGER OPERATOR 5

6 Integration Tests. Main Tested Functionality
3. How to solve interoperability problems before placing in service a new line? Integration Tests. Main Tested Functionality Speed supervision and braking curves Level transitions Mode changes TSR Managing Managing of MA timers Odometry Track conditions Train Interface unit ATO and preset speed DMI National Functions Maximum Speed for exploitation with free route ahead Degraded situations (loss of comunications, balise group lost, etc) EoA override RBC Handover

7 This is the selected way in Spanish Projects
3. How to solve interoperability problems before placing in service a new line? To achieve full interoperability two options are possible: Performing INT tests once the whole system is installed on the track. This is the selected way in Spanish Projects 2. Advance interoperability issues by performing INT tests in a lab and after solving the problems appeared, running INT tests on track. Radio Block Centre (RBC) GSM-R ETCS Onboard Unit Interlocking Eurobalises (Fix) End of section

8 3. How to solve interoperability problems before placing in service a new line?
CEDEX Rail Interoperability Lab is the first laboratory in the world accredited for certifying ERTMS components and for testing ERTMS lines. The laboratory was created in It is has been the pioneer on testing ETCS components and subsystems and it has tested equipment's from almost all ERTMS worldwide suppliers. The laboratory has actively participated in the process of placing in service ERTMS in the Spanish High Speed and Conventional Lines (Madrid commuter lines). The laboratory has designed, together with Adif, Renfe and the Ministry of Fomento, the set of INT tests (around 200 tests) which really guarantee full interoperability.

9 3. How to solve interoperability problems before placing in service a new line?
Background Components specification, including functional tests specification – Subset-076 Tests defined for the whole lifecycle (almost) On-board subsystem Components specification No functional tests for key components (RBC) ETCS Language too flexible: lack of procedures to validate ETCS trackside implementations Trackside subsystem

10 Possible solutions IN THE MID-LONG TERM:
3. How to solve interoperability problems before placing in service a new line? Possible solutions IN THE MID-LONG TERM: Develop functional test specifications for the (generic) RBC. Develop procedures for verification of the trackside ETCS engineering from the design phase (project specific). Insist on the operational harmonization, keeping in mind the strong relationship among operational rules, ETCS functionality and ETCS language syntax. IN THE SHORT TERM: Bring the final project specific integration/interoperability tests into the laboratory to perform Operational and Train-Track integration tests with real ETCS components (ETCS OBU and/or RBC)

11 Track layout, switches, signals, track circuits...
4. Testing the line in the laboratory. The real track data and configuration is introduced into the real Radio Block Center (RBC)……… Track layout, switches, signals, track circuits...

12 4. Testing the line in the laboratory.
And the real RBC is connected to the laboratory

13 4. Testing the line in the laboratory.
The real train data are introduced into the real On Board Unit (EVC)….. Braking capacity, brakes activation, train interface unit (odometry, pantograph, main switch)…..

14 4. Testing the line in the laboratory.
And the real On Board Unit is connected to the laboratory

15 Simulators with real project data for: Interlockings Train dynamics,
4. Testing the line in the laboratory. RBC and OBU are integrated and tested in the lab connected to all the simulators reproducing: a) the real train dynamics and b) track circuits occupancy, interlocking selected routes and balise telegrams. Real RBC Dimetronic Madrid – Levante Line Real EVC ALSTOM Simulators with real project data for: Interlockings Train dynamics, Train odometry Track circuits and switches Routes. Balise telegrams…….

16 USE OF COMMON FORMATS AND INTERFACES
4. Testing the line in the laboratory. USE OF COMMON FORMATS AND INTERFACES

17 TCL RBC Thales IXL RBC (CITEF) Test Layout for independent
4. Testing the line in the laboratory. Route Map Controller (RMC) (active) TCL Define signal aspects Define points position RBC Thales ATOCHA (SS-112) Route Map Controller (RMC) (passive) Track Occupation IXL (CITEF) Routes’ dialog Track occupation RBC Invensys-Siemens Signal aspects Point pos. CHAMARTIN (SS-112) ALSTOM EVC SS-094 Architecture EVC Adaptor TCP-IP Radio Test Layout for independent RBC / EVC integration tests Network Simulator ERSA Isdn isdn Map to SS-111 Architecture

18 Route Map Controller (RMC) ATOCHA & CHAMARTIN SS-112 unified
4. Testing the line in the laboratory. Route Map Controller (RMC) ATOCHA & CHAMARTIN SS-112 unified Routes’ dialog Track occupation RBC Thales RBC Invensys-Siemens IXL (CITEF) ALSTOM EVC SS-094 Architecture EVC Adaptor TCP-IP Radio Network Simulator ERSA PABX ISDN-IP Invensys / Thales HO Com. channel Test Layout for handover tests between RBCs

19 Track layout: Project data in unified format (SS-112).
Madrid-Valencia line: Horcajada station

20 TRACK / LAB COMPARISON: LABORATORY VALIDATION

21 4. Testing the line in the laboratory.
Laboratory Validation CEDEX ERTMS lab has been previously validated by comparison between the simulated and the real results. This validation it is needed to guarantee a full confidence in the lab results and to assure a correct signaling system behavior during the commercial exploitation. TRAFFIC SIMULATOR ERTMS L2 LABORATORY

22 DEFINITION OF THE OPERATIONAL SCENARIO FOR LABORATORY VALIDATION
4. Testing the line in the laboratory. Laboratory validation DEFINITION OF THE OPERATIONAL SCENARIO FOR LABORATORY VALIDATION Trip between Valdemoro y Villarubia stations Trackside: Dimetronic / Onboard: Siemens

23 COMPARISON OF THE CALCULATION OF PERMITTED SPEEDS (L1)
4. Testing the line in the laboratory. Laboratory validation Permitted Speed 50 100 150 200 250 300 40000 45000 50000 55000 60000 65000 70000 75000 80000 85000 90000 DTeórica (m) Vpermitica (km/h) Permitted Speed Vía Permitted Speed Lab COMPARISON OF THE CALCULATION OF PERMITTED SPEEDS (L1) 23

24 COMPARISON OF THE ESTIMATION OF TRAVELLED DISTANCES
4. Testing the line in the laboratory. Laboratory validation COMPARISON OF THE ESTIMATION OF TRAVELLED DISTANCES

25 COMPARISON OF BRAKING CURVES: TRACK; LABORATORY & LIF & ERA MODELS
4. Testing the line in the laboratory. Laboratory validation COMPARISON OF BRAKING CURVES: TRACK; LABORATORY & LIF & ERA MODELS

26 DEFINITION OF THE OPERATIONAL SCENARIO FOR LABORATORY VALIDATION
4. Testing the line in the laboratory. Laboratory validation DEFINITION OF THE OPERATIONAL SCENARIO FOR LABORATORY VALIDATION Validation trip in LEVEL 2 Trip between Nuevos Ministerios and Atocha commuter stations Trackside: Thales / Onboard: Alstom Atocha Nuevos Ministerios Atocha Level 2 Laboratory validation operational scenario for the commuter lines of Madrid: Train starting at the Balise Group 8102 (associated to signal S2/6M). Track free until signal S32 (Balise Group 8102) that will take free aspect when train approaches. Once S32 shows green aspect the signaling system will allocate track free until Atocha Atocha entry signal E6 shows non proceed aspect 26

27 Validation trip in LEVEL 2
4. Testing the line in the laboratory. Laboratory validation Braking Curve Speed Distance Validation trip in LEVEL 2 Permitted Speed Track Lab BG Track BG Lab Track MA Lab MA P24 Lab P24 Track P136 Lab P136 Track

28 RIL EVC Certification Placing in service Project data bases
5. CEDEX Rail Interoperability Lab . RIL Eurocab Laboratory Traffic Simulation Laboratory Eurobalise and BTM Laboratory Energy Laboratory CEDEX-CIEMAT EVC Certification Placing in service Project data bases Assesment & Maintenace Level 2 tests 2.3.0 “d” Migration Train-track integration tests Operational tests Remote connections Eurobalise certification Antenna/BTM Certification Euroloop Certification Eurobalise Assesment Energy storage Power electronics New sources of energy Management of energetic resources

29 RIL Eurocab Laboratory Traffic Simulation Laboratory
5. CEDEX Rail Interoperability Lab . RIL Eurocab Laboratory Traffic Simulation Laboratory Eurobalise and BTM Laboratory Energy Laboratory CEDEX-CIEMAT European Test campaigns Alstom Ansaldo Bombardier Dimetronic Siemens VUZ (Chech Republic)* CAF* Level 1: Ansaldo Thales Dimetronic Alstom Level 2: General Electric* Ansaldo* CAF* Infrabel European Cross tests European Test campaigns Alstom Ansaldo Bombardier Siemens Thales Digitek Beijing Microunion Hitachi Kyosan (Japan) Shingwooeng (Korea) CARS (China Academy of Railways Science) Beijing Hollysysy (China) Beijing Jioda Signal Beijing Railway Signal Lanxin (China) Casco (China) CAF*

30 EUROBALISE LABORATORY
European Test Specifications (SS 085) were debugged at CEDEX lab (2004)

31 CEDEX Euroloop lab is the first independent lab performing these tests
EUROLOOP LABORATORY CEDEX Euroloop lab is the first independent lab performing these tests

32 European Cross Tests are being run at CEDEX lab
TRAFFIC SIMULATION LABORATORY THALES RBC DIMETRONIC / SIEMENS RBC ALSTOM EVC European Cross Tests are being run at CEDEX lab TEST LAY-OUT TO TEST THE LEVEL 2 ON THE COMMUTER LINES OF MADRID (MINISTRY OF FOMENTO)

33 EUROCAB LABORATORY Eurocab lab for certifying EVCs against european specifications. CEDEX is the leader of the European Group creating these specifications (SS076)

34 EUG CROSS TEST BETWEEN COMMERCIAL PROJECTS
5. CEDEX Rail Interoperability Lab . EUG CROSS TEST BETWEEN COMMERCIAL PROJECTS Using remote connection between EBC and EVC for level 2

35 6. Conclusions. CONCLUSIONS At the time being, ERTMS reliability and punctuality in Spain is very high, it is really comparable with the mature national systems previously installed in HSL(LZB,TVM). By following the proposed test procedure, the whole ERTMS line functionality is tested in advance. All interoperability problems appeared between the track subsystem supplier and the On board subsystem supplier are previously solved. In all Spanish ERTMS lines, once the integration tests have been successfully completed, not any important interoperability issue has appeared during the commercial exploitation. CEDEX lab has already performed these tests in all Spanish ERTMS lines. It is the European first Reference lab (and therefore the first lab in the world) in this area and it has tested ERTMS equipments from almost all the world suppliers. Before placing in service any new line, integration tests will be also run on track, but these tests will be strongly supported by the integration tests at lab. This is the way of avoiding any “last minute” problems.

36 CEDEX Rail Interoperability Laboratory
THANKS A LOT FOR YOUR KIND ATTENTION CEDEX Rail Interoperability Laboratory Testing real projects signalling system at the Railway Interoperability Laboratory (LIF) of CEDEX CEDEX ( Studies and Research Center of the Ministry of Public Works and Transport-Fomento) Madrid, April 2014


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