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UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD.

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Presentation on theme: "UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD."— Presentation transcript:

1 UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD Laboratory UC San Diego Computer Engineering VLSI CAD Laboratory Previously proposed gate-length biasing (Gupta et al. ’04) selectively increases the gate length of devices to reduce leakage at the cost of device delay increase. Only the devices on non-critical paths are biased for minimum circuit delay penalty. Biasing a device can prevent biasing other devices so order in which devices are biased is important. Bias in order of decreasing sensitivity (≡ leakage improvement/delay penalty).  Accurate estimation of leakage is important. We add “defocus awareness” by substituting leakage estimation in gate-length biasing with our defocus-aware estimation. Results Leakage after traditional and defocus-aware gate-length biasing. Optimized for nominal process corner and the input topography. Previously proposed gate-length biasing (Gupta et al. ’04) selectively increases the gate length of devices to reduce leakage at the cost of device delay increase. Only the devices on non-critical paths are biased for minimum circuit delay penalty. Biasing a device can prevent biasing other devices so order in which devices are biased is important. Bias in order of decreasing sensitivity (≡ leakage improvement/delay penalty).  Accurate estimation of leakage is important. We add “defocus awareness” by substituting leakage estimation in gate-length biasing with our defocus-aware estimation. Results Leakage after traditional and defocus-aware gate-length biasing. Optimized for nominal process corner and the input topography. Exponential dependence of leakage on linewidth. Pessimism in linewidth variation  large leakage pessimism and over-design. Need to model systematic linewidth-variation components for improved leakage estimation. Our leakage estimation methodology reduces leakage spread by half and can estimate leakage of all devices with better accuracy. Leakage optimization benefits from improved leakage estimation e.g., up to 7% more leakage reduction from gate-length biasing. Future work: Model other systematic variations such as lens aberrations. Consider delay impact of systematic variations within leakage optimization. Exponential dependence of leakage on linewidth. Pessimism in linewidth variation  large leakage pessimism and over-design. Need to model systematic linewidth-variation components for improved leakage estimation. Our leakage estimation methodology reduces leakage spread by half and can estimate leakage of all devices with better accuracy. Leakage optimization benefits from improved leakage estimation e.g., up to 7% more leakage reduction from gate-length biasing. Future work: Model other systematic variations such as lens aberrations. Consider delay impact of systematic variations within leakage optimization. Leakage power is one of the most critical issues for ultra-deep submicron technology. Subthreshold leakage is dependent exponentially on linewidth and therefore variation in linewidth translates to a large leakage variation. A significant fraction of variation in linewidth occurs due to systematic variations involving focus and pitch. In this work, we propose a new leakage estimation methodology that accounts for focus- dependent variation in linewidth. The ideas presented in this work significantly improve leakage estimation and can be used in existing leakage reduction techniques to improve their efficacy. We modify the previously proposed gate-length biasing technique to consider systematic variations in linewidth and further reduce leakage power. Our method reduces the spread in estimated leakage between worst-case and best-case process corners by up to 56%. Defocus-awareness improves leakage reductions from gate- length biasing by up to 7%. Leakage power is one of the most critical issues for ultra-deep submicron technology. Subthreshold leakage is dependent exponentially on linewidth and therefore variation in linewidth translates to a large leakage variation. A significant fraction of variation in linewidth occurs due to systematic variations involving focus and pitch. In this work, we propose a new leakage estimation methodology that accounts for focus- dependent variation in linewidth. The ideas presented in this work significantly improve leakage estimation and can be used in existing leakage reduction techniques to improve their efficacy. We modify the previously proposed gate-length biasing technique to consider systematic variations in linewidth and further reduce leakage power. Our method reduces the spread in estimated leakage between worst-case and best-case process corners by up to 56%. Defocus-awareness improves leakage reductions from gate- length biasing by up to 7%. Leakage decreases exponentially with linewidth (gate length). Better linewidth estimation  better leakage estimation. Linewidth variation is partly systematic. Using defocus and line pitch, 30% of gate-length variations can be modeled. Defocus and pitch determine systematic linewidth variations. Recent advances in simulation of chemical-mechanical planarization (CMP) of shallow trench isolation (STI) layer allow accurate topography prediction. Topography variation contributes significantly to defocus. Defocus can be predicted from layout analysis. Can calculate line pitches from layout analysis (with LVS).  Core idea: Layout Analysis  Linewidth Prediction  Accurate Leakage Estimation Leakage decreases exponentially with linewidth (gate length). Better linewidth estimation  better leakage estimation. Linewidth variation is partly systematic. Using defocus and line pitch, 30% of gate-length variations can be modeled. Defocus and pitch determine systematic linewidth variations. Recent advances in simulation of chemical-mechanical planarization (CMP) of shallow trench isolation (STI) layer allow accurate topography prediction. Topography variation contributes significantly to defocus. Defocus can be predicted from layout analysis. Can calculate line pitches from layout analysis (with LVS).  Core idea: Layout Analysis  Linewidth Prediction  Accurate Leakage Estimation Methodology Create Bossung LUT using several parallel line patterns of varying pitch and for defocus values in the range -200:20:200nm. Use standard-cell placement and orientation information with device spacings from cell boundaries to compute device pitches. Use CMP simulator (e.g., Lee ’02) to simulate topography. Our assumed topography: +100nm at die center and decreases quadratically with distance from center to -100nm at die corners. Use Bossung LUT to predict device linewidth and leakage. To find cell leakage, find the fraction of time each device leaks over all input combinations and take weighted sum. Experimental Setup Commercial tools for synthesis, placement, SPICE, library characterization, OPC, and PrintImage simulation. Systematic variation due to defocus: -6nm to 2nm. Assumptions: random variations of ±8nm, defocus variation of ±200nm is 100% random when topography is not specified and 50% random when topography is specified. Results Estimated leakage at the three process corners using traditional and the proposed defocus-aware leakage estimation flow in the absence and presence of a topography map. Methodology Create Bossung LUT using several parallel line patterns of varying pitch and for defocus values in the range -200:20:200nm. Use standard-cell placement and orientation information with device spacings from cell boundaries to compute device pitches. Use CMP simulator (e.g., Lee ’02) to simulate topography. Our assumed topography: +100nm at die center and decreases quadratically with distance from center to -100nm at die corners. Use Bossung LUT to predict device linewidth and leakage. To find cell leakage, find the fraction of time each device leaks over all input combinations and take weighted sum. Experimental Setup Commercial tools for synthesis, placement, SPICE, library characterization, OPC, and PrintImage simulation. Systematic variation due to defocus: -6nm to 2nm. Assumptions: random variations of ±8nm, defocus variation of ±200nm is 100% random when topography is not specified and 50% random when topography is specified. Results Estimated leakage at the three process corners using traditional and the proposed defocus-aware leakage estimation flow in the absence and presence of a topography map. Background Defocus-Aware Leakage Estimation and Control ( http://vlsicad.ucsd.edu ) Puneet Sharma (sharma@ucsd.edu) Advisor: Prof. Andrew B. Kahng Jointly with Mr. Swamy Muddu Electrical & Computer Engineering Introduction Defocus-Aware Leakage Estimation Defocus-Aware Gate-Length Biasing Conclusions and Ongoing Work Bossung Plot Linewidth is a function of pitch and defocus. Layout AnalysisPlaced Design Device PitchesDefocus over Die CMP Simulation Bossung Lookup Table Predicted Linewidths Leakage Estimation Compute SensitivitySelect & Bias Cell Timing Analysis Unbias if slack not met Defocus-Aware Leakage Estimation


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