1. 1 paper I design and implementation of the aegis single-chip secure processor using physical random functions, isca’05 nuno alves 28/sep/06

2. 2 introduction paper about? new computer architecture for secure computation what’s interesting? use of manufacturing process variations to generate random numbers

3. 3 why? why do we need random numbers in a computer architecture? identify a computer encrypt and decrypt sensitive information verify and validate the source

4. 4 generating random signals always 1 inputs conclusion: process variations prevent output to be always the same 1 if top signal is faster output

5. 5 paper II making typical silicon matter with razor. ieee proc’04. nuno alves 28/sep/06

6. 6 introduction paper about? architecture for safely scaling down voltage tradeoffs: energy  = vdd  = performance  clock frequency  = vdd 

7. 7 voltage scaling reduce voltage for period of low processor utilization there is a minimum required voltage

8. 8 determining worst case scenario fast multiplier = slow multiplier? slow, but always right, multipliers start decreasing vdd

9. 9 results that’s like… 1 error in every 1.8 billion operations No errors at 27  No errors at 85  98.7% accurate here

10. 10 detecting infrequent errors same as main flip-flop but delayed

11. 11 correcting infrequent errors error detected, stall clock

12. 12 mitigating reliability and variability problems this architecture : eliminates voltage margins associated with variations between different chip instances helps with gamma rays and alpha particles