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SNIFFER Board for PCI-Express channel SNIFFER Board for PCI-Express channel Final Presentation 12.12.06 Presenting: Roy Messinger Presenting: Roy Messinger.

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Presentation on theme: "SNIFFER Board for PCI-Express channel SNIFFER Board for PCI-Express channel Final Presentation 12.12.06 Presenting: Roy Messinger Presenting: Roy Messinger."— Presentation transcript:

1 SNIFFER Board for PCI-Express channel SNIFFER Board for PCI-Express channel Final Presentation 12.12.06 Presenting: Roy Messinger Presenting: Roy Messinger Instructor: Boaz Mizrachi Instructor: Boaz Mizrachi המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering

2 Goals  Design and development of a printed circuit board capable of sniffing to the PCI-E channel without interference to the data passing (passive listener).  The sampled data will be sent to a different card (Virtex II pro) and will be analyzed for errors.  Getting knowledge in the various communication types implemented on board (RS232, SPI, I²C & PCI-E)

3 Sniffer Specification  34x34 Cross Point Switch which sniffs the PCI-E channel and divert the information to the outside Xilinx Virtex II pro.  PIC uController configures the Cross Point Switch ( SPI architecture).  External computer configures the uController through RS232 architecture (UART).  EEPROM connected to the uController for additional future usage ( I²C architecture).

4 Communication LayoutPCI-E SPI I²C RS232

5 Schematic overview PCI-E Mother Board PCI-E Graphic card PCI-E Sniffer Test Equipment System screen

6 Block Diagram M21121 34x34 PIC uController 18F458 RESET Power supply 3.3Vdc 2.5Vdc3.3Vdc (ATX- optional) Dip Switch Prog. Connector 4MHz Debug Leds Virtex II pro UART RS232 TCVR RS232 D-type connector EEPROM 24LC16B I²C SPI 32+32 2+2 SMA RS232 PCI EXPRESS x16 link 3.3Vdc Status Leds

7 uController:   PIC 18F458 uController code was generally based upon assembly+C code of existing Crossbar of the lab.   Changes included defining ‘sense’ pins of PCI-E and attribute them to uCont. For debug use, etc. uController E²PROM Dipswitch 34x34 Xpnt Debug leds

8 Sniffing the channel Other Options examined (using 4x4 switch):

9 Sniffer Specification  INTERFACES:  I²C – uController to EEPROM.  SPI – uController to Cross Point Switch.  RS232 – uController to UART. – D-type to external computer. – D-type to external computer.  PCI-E – MB to graphic card, Crossbar to link  CLOCK:  4MHz clock oscillator for PIC uController.

10 Sniffer Specification-Cont.  POWER SUPPLY:  3.3v – DC-DC converter from 5v to 3.3v, up to 3A  2.5v – DC-DC converter from 5v to 2.5v, up to 3A  M21121 34x34 Cross Point Switch :  Vdd – 2.5v. Configuration and programming interface voltage  Optional – Vdd-3.3v.  18F458 PIC uController :  Vdc- 3.3v interface voltage

11 Sniffer Specification-Cont.  Layout Stackup: 2 mid layers are Vcc and GND for more capacitance – more filtering Line-Space-Line width was determined using Hyperlinx © in order to achieve 100  Diff. Imp., 50  Single Ended Imp. 4.5  8  4.5 mil Extreme Delicate Editing!

12 Sniffer Specification-Cont.  INTERFACES:  Interface from external computer to Sniffer through RS232 is accomplished using a VB.Net GUI based software, which send pre-defined scripts to the components on Board:

13 Mechanical DesignDraft: Final

14 Sniffer Final board:

15 Sniffer Debug Phase:  The crosspoint was configured in such way to shorten the input and output SMA connector. Afterwards, a Pulse Generator and a Scope was brought to test the Sniffer. Scope Pulse Gen. PCI-E Sniffer ‘10101010…’ ‘10101010…’

16 Sniffer Debug Phase:  PRBS function was used in the Pulse Generator in order to see eye pattern. Voltage was 0.7p-p (or +0.35V, -0.35V) according to the PCI-E spec. Eye diagram when Input32 (J6, J8) is switched to output32 (J3, J5), Equalization enabled Eye diagram when Input32 (J6, J8) is switched to output32 (J3, J5), Equalization disabled

17 Sniffer Debug Phase:  A PCI-E X1 LAN board was connected in order to verify the crosspoint ability to transfer signals correctly. PCI-E Sniffer PCI-E X1 Lan card ‘10101010…’

18 Thanks Many thanks to all the lab staff: Many thanks to all the lab staff:  Eli Shushan  Mony Orbach  Ina Rivkin  Bruria And of course: Boaz Mizrachi


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