1. 12/6/2004EE 42 fall 2004 lecture 401 Lecture #40: Review of circuit concepts This week we will be reviewing the material learned during the course Today: review –passive devices –circuit concepts –Load lines –RC transients

2. 12/6/2004EE 42 fall 2004 lecture 402 BRANCHES AND NODES Circuit with several branches connected at a node: branch (circuit element) (Sum of currents entering node)  (Sum of currents leaving node) = 0 q = charge stored at node is zero. If charge is stored, for example in a capacitor, then the capacitor is a branch and the charge is stored there NOT at the node. KIRCHOFF’s CURRENT LAW

3. 12/6/2004EE 42 fall 2004 lecture 403 GENERALIZATION OF KCL TO SURFACES Sum of currents entering and leaving any “black box” is zero Could be a big chunk of circuit in here, e.g., could be a “Black Box” In other words there can be lots of nodes and branches inside the box.

4. 12/6/2004EE 42 fall 2004 lecture 404 KIRCHHOFF’S CURRENT LAW USING SURFACES Example entering leaving 5  A 2  A i = ? surface i must be 50 mA 50 mA i? Another example i=7  A

5. 12/6/2004EE 42 fall 2004 lecture 405 BRANCH AND NODE VOLTAGES The voltage across a circuit element is defined as the difference between the node voltages at its terminals Specifying node voltages: Use one node as the implicit reference (the “common” node … attach special symbol to label it) Now single subscripts can label voltages: e.g., v b means v b  v e, v a means v a  v e, etc. c e v2v2 v1v1 d a b +   + (since it’s the reference) select as ref.  “ground”

6. 12/6/2004EE 42 fall 2004 lecture 406 KIRCHHOFF’S VOLTAGE LAW (KVL) The algebraic sum of the “voltage drops” around any “closed loop” is zero. Voltage drop  defined as the branch voltage if the + sign is encountered first; it is (-) the branch voltage if the  sign is encountered first … important bookkeeping Why? We must return to the same potential (conservation of energy). + - V 2 Path “rise” or “step up” (negative drop) + - V 1 Path “drop” Closed loop: Path beginning and ending on the same node

7. 12/6/2004EE 42 fall 2004 lecture 407 FORMAL CIRCUIT ANALYSIS USING KCL: NODAL ANALYSIS 2 Define unknown node voltages (those not fixed by voltage sources ) 1 Choose a Reference Node 4 Solve the set of equations (N equations for N unknown node voltages) 3Write KCL at each unknown node, expressing current in terms of the node voltages (using the constitutive relationships of branch elements)

8. 12/6/2004EE 42 fall 2004 lecture 408 NODAL ANALYSIS USING KCL –Example: The Voltage Divider – 1 Choose reference node 2 Define unknown node voltages V2V2 3 Write KCL at unknown nodes 4 Solve: +V2+V2 R1R1 V SS +  i2i2 i1i1 R2R2 This is of course the voltage divider formula and is by itself very useful.

9. 12/6/2004EE 42 fall 2004 lecture 409 GENERALIZED VOLTAGE DIVIDER (solved without Nodal Analysis) Circuit with several resistors in series R 2 R 1 V SS I R 3 R 4  +  +  + V 1 ? V3?V3? We know Thus, and etc..

10. 12/6/2004EE 42 fall 2004 lecture 4010 WHEN IS VOLTAGE DIVIDER FORMULA CORRECT? R 2 R 1 V SS I R 3 R 4  +  + 4321 2 2 V RRRR R V    Correct if nothing else connected to nodes 3 V SS I R 2 R 1 R 3 R 4  +  + Z V R 5 i X 4321 2 Z V RRRR R V    because R 5 removes condition of resistors in series – i.e. Ii 3  What is V Z ? Answer: SS 43521 2 V )RR(RRR R   V2V2

11. 12/6/2004EE 42 fall 2004 lecture 4011 RESISTORS IN PARALLEL R 2 R 1 I SS I 2 I 1 2 Define unknown node voltages V X 1 Select Reference Node Note: I ss = I 1 + I 2, i.e., RESULT 1EQUIVALENT RESISTANCE: RESULT 2CURRENT DIVIDER:

12. 12/6/2004EE 42 fall 2004 lecture 4012 IDENTIFYING SERIES AND PARALLEL COMBINATIONS Use series/parallel equivalents to simplify a circuit before starting KVL/KCL  + V I R R R R 2 1 4 R 3 R 6 5  + I R X ? parallel

13. 12/6/2004EE 42 fall 2004 lecture 4013 IDENTIFYING SERIES AND PARALLEL COMBINATIONS (cont.) Some circuits must be analyzed (not amenable to simple inspection) Special cases: R 3 = 0 OR R 3 =  R 1 and R 5 are not in series R 1 and R 2 are not in || OR IF R 3 =   (R 1 + R 5 ) || (R 2 + R 4 ) R1R1  + R4R4 R5R5 R2R2 V R3R3 R eq = R 1 || R 2 + R 4 || R 5 Example: R 3 = 0  R 1 || R 2 ; R 4 || R 5 in series;

14. 12/6/2004EE 42 fall 2004 lecture 4014 TWO-TERMINAL LINEAR RESISTIVE NETWORKS (“One Port” Circuit) Model of two-terminal linear resistive elements with only two “accessible” terminals Replace a complicated circuit with a simple model  + a b

15. 12/6/2004EE 42 fall 2004 lecture 4015 BASIS OF THÉVENIN THEOREM All linear one-ports have linear I-V graph A voltage source in series with a resistor can produce any linear I-V graph by suitably adjusting V and I We define the voltage-source/resistor combination that replicates the I-V graph of a linear circuit to be the Thévenin equivalent of the circuit. The voltage source V T is called the Thévenin equivalent voltage and the resistance R T is called the Thévenin equivalent resistance. THUS

16. 12/6/2004EE 42 fall 2004 lecture 4016 I-V CHARACTERISTICS OF LINEAR TWO-TERMINAL NETWORKS i +  v +  5V Apply v, measure i, or vice versa 5.5 1 v(V) -.5 i(mA) Associated (i defined in) 5K Associated What is the easy way to find the I-V graph? First find open-circuit V v=5V if i = 0 Now find Short-circuit I i = -1mA if v = 0

17. 12/6/2004EE 42 fall 2004 lecture 4017 I-V CHARACTERISTICS OF LINEAR TWO-TERMINAL NETWORKS 5.5 1 v(V) -.5 i(mA) If V = 2.5V If R = 2.5K i +  v +  5V Apply v, measure i, or vice versa Consider how the graph changes with differences in V and R. First consider change in V, eg V= 2.5V, not 5V 5K Now consider change in R (with V back at 5V) Clearly by varying V and R we can produce an arbitrary linear graph … in other words this circuit can produce any linear graph

18. 12/6/2004EE 42 fall 2004 lecture 4018 Thévenin Equivalent Circuit +  VTVT RTRT i +  V Any linear circuit i +  V This circuit is equivalent to any circuit, that is by suitably choosing V T and R T it will have the same I-V graph So how do we choose V T and R T ?

19. 12/6/2004EE 42 fall 2004 lecture 4019 NORTON EQUIVALENT CIRCUIT Corollary to Thévenin: R N is found the same way as for Thévenin equivalent R N I N (associated) i + V -

20. 12/6/2004EE 42 fall 2004 lecture 4020 EXAMPLE 1, Continued In what sense is this circuit B A 2 K   + 2 V 2 K  1K 1V B A +-+- 1 K 1 mA B A They have identical I-V characteristics and therefore have The same open circuit voltage The same short circuit current For any voltage, they will produce the same current And visa versa equivalent to these?

21. 12/6/2004EE 42 fall 2004 lecture 4021 Load line method We can find the currents and voltages in a simple circuit graphically. For example if we apply a voltage of 2.5V to the two resistors of our earlier example: We draw the I-V of the voltage and the I-V graph of the two resistors on the same axes. Can you guess where the solution is? At the point where the voltages of the two graphs AND the currents are equal. (Because, after all, the currents are equal, as are the voltages.) 1K 4K 2.5V +-+- Combined 1K + 4K I 2 4 (ma) V (Volt) 5 2.5V Solution: I = 0.5mA, V = 2.5V I +-+- V

22. 12/6/2004EE 42 fall 2004 lecture 4022 Another Example of the Load-Line Method Lets hook our 2K resistor + 2V source circuit up to an LED (light-emitting diode), which is a very nonlinear element with the IV graph shown below. Again we draw the I-V graph of the 2V/2K circuit on the same axes as the graph of the LED. Note that we have to get the sign of the voltage and current correct!! I 2 4 (ma) V (Volt) 5 Solution: I = 0.7mA, V = 1.4V I +-+- V +-+- 2V 2K LED At the point where the two graphs intersect, the voltages and the currents are equal, in other words we have the solution.

23. 12/6/2004EE 42 fall 2004 lecture 4023 Simplification for time behavior of RC Circuits Before any input change occurs we have a dc circuit problem (that is we can use dc circuit analysis to relate the output to the input). We call the time period during which the output changes the transient We can predict a lot about the transient behavior from the pre- and post-transient dc solutions time voltage output Long after the input change occurs things “settle down” …. Nothing is changing …. So again we have a dc circuit problem.

24. 12/6/2004EE 42 fall 2004 lecture 4024 RC RESPONSE V in “jumps” at t=0, but V out cannot “jump” like V in. Why not? Case 1 – Rising voltage. Capacitor uncharged: Apply + voltage step  Because an instantaneous change in a capacitor voltage would require instantaneous increase in energy stored (1/2CV²), that is, infinite power. (Mathematically, V must be differentiable: I=CdV/dt) Input nodeOutput node ground R C V in V out + - V does not “jump” at t=0, i.e. V(t=0 + ) = V(t=0 - ) time V in 0 0 V1 V out The dc solution before the transient tells us the capacitor voltage at the beginning of the transient.

25. 12/6/2004EE 42 fall 2004 lecture 4025 RC RESPONSE Case 1 Continued – Capacitor uncharged: Apply voltage step After the transient is over (nothing changing anymore) it means d(V)/dt = 0 ; that is all currents must be zero. From Ohm’s law, the voltage across R must be zero, i.e. V in = V out. V out approaches its final value asymptotically (It never actually gets exactly to V1, but it gets arbitrarily close). Why?  That is, V out  V1 as t  . (Asymptotic behavior) time V in 0 0 V1 V out Input nodeOutput node ground R C V in V out + - Again the dc solution (after the transient) tells us (the asymptotic limit of) the capacitor voltage during the transient.

26. 12/6/2004EE 42 fall 2004 lecture 4026 RC RESPONSE Example – Capacitor uncharged: Apply voltage step of 5 V We know this because of the pre-transient dc solution (V=0) and post-transient dc solution (V=5V). Clearly V out starts out at 0V ( at t = 0 + ) and approaches 5V. time V in 0 0 5 V out Input nodeOutput node ground R C V in V out + - So we know a lot about V out during the transient - namely its initial value, its final value, and we know the general shape.

27. 12/6/2004EE 42 fall 2004 lecture 4027 Review of simple exponentials. Rising Exponential from Zero Falling Exponential to Zero at t = 0, V out = 0, and at t ,V out  V 1 also at t = , V out = 0.63 V 1 8 at t = 0, V out = V 1, and at t ,V out  0, also at t = , V out = 0.37 V 1 8 time V out 0 0 V1V1 .63V 1 V out V1V1 time 0 0 .37V 1 V out = V 1 (1-e -t/  ) V out = V 1 e -t/ 

28. 12/6/2004EE 42 fall 2004 lecture 4028 Further Review of simple exponentials. Rising Exponential from Zero Falling Exponential to Zero We can add a constant (positive or negative).63V 1 + V 2 V out 0 V 1 + V 2 time 0  V2V2 V out 0 0 V 1 + V 2 .37V 1 + V 2 V2V2 V out = V 1 (1-e -t/  ) V out = V 1 e -t/  V out = V 1 (1-e -t/  ) + V 2 V out = V 1 e -t/  + V 2

29. 12/6/2004EE 42 fall 2004 lecture 4029 Further Review of simple exponentials. Rising Exponential Falling Exponential Both equations can be written in one simple form: Thus: if B 0, falling exponential Initial value (t=0) : V ou t = A + B. Final value (t>>  ): V ou t = A time V out 0 0 A+B A Here B > 0 V out 0 A time 0 A+B Here B < 0 V out = V 1 (1-e -t/  ) + V 2 V out = V 1 e -t/  + V 2 V out = A + Be -t/ 

30. 12/6/2004EE 42 fall 2004 lecture 4030 LOGIC GATE DELAY  D Time delay  D occurs between input and output: “computation” is not instantaneous Value of input at t = 0 + determines value of output at later time t =  D A B F 0 1 1 0 Logic State t t DD 0 0 Input (A and B tied together) Output (Ideal delayed step-function) Actual exponential voltage versus time. Capacitance to Ground F

31. 12/6/2004EE 42 fall 2004 lecture 4031 t t t Logic state  22 0  SIGNAL DELAY: TIMING DIAGRAMS Show transitions of variables vs time 1 0 t  22 33 Note that C changes two gate delays after A switches. Note B changes one gate delay after A switches A BC D A B D C Note that D changes three gate delays after A switches. Oscilloscope Probe