1. 1 Some things we think we learned & the road ahead The RAMPants (as prepared by Mark Oskin) But first, let us thank you for the invaluable feedback you have already provided.

2. 2 RDL & Timing Clarification of our language: –RDL is responsible for maintaining the RAMP system clock. This is not the hardware clock. –Component models can be functional (operational only), or timing (operational+proper delay). Timing models are required even when real hardware is available.

3. 3 RDL 2006-2007 Fall 2006: physical device plug-ins Winter 2007: tracing support Spring 2007: interactive debugging Help from others (including outside Berkeley?)

4. 4 RAMP Colors Clarification of our language: White –Red / White / Blue represent significant non-trivial examples of how architects and software designers can utilize the RAMP system. –They are examples, generally not our (the PI’s) vision of the only proper road ahead for the future of computing. White –Researchers should use RAMP, but not necessarily be limited to RAMP- Red / White / Blue

5. 5 RAMP Red (Transactional Memory) January 2007: –64 processors (hard) –Functionally working –SpecJbb –XUP + 8 board BEE2 June 2007: –128+ processors (soft) –I/O and proper timing

6. 6 RAMP Blue (Message Passing) January 2007: –128 uBlaze (or other soft core) –MPI –LAMP, SPECWeb –XUP + 8 board BEE2 system June 2007: –256 processors (soft-core w/MMU) –BLUE-prime: “Data center in a box” Healthy I/O modeling support Soft-core w/real Linux –16 board BEE2 system

7. 7 White RAMP White (Shared Memory) January 2007: –64+ processor system –Shared memory/Cache coherent (ring) –Booting Linux –XUP + 8 board BEE2 system June 2007: –Utilizing a robust soft-core that is: Small Runs a real OS (MMU) Has “industrial strength” test suites behind it –NAS/LAMP –16 board BEE2 system

8. 8 Benchmarks Important for early adoption White/Blue - NAS White/Blue-prime - LAMP White/Blue-prime - SpecWEB Red - SpecJbb, AI/Bio

9. 9 Instruction Set Architecture Need to decide in the next 2 months (Sept 1st!) on an ISA to meet June 2007 target –Verification suite –Running full Linux –Size of design (LUTs/BRAMs) –Executes commercial application binaries –Friendly licensing –Configurability

10. 10 BEE3 Hardware Delay significant thinking about BEE3 for 6 months –Target BEE3 for Jan 2008 –Learn more from existing large-scale multi- board BEE2 board use Xilinx: We (RAMP) would really like to have input into XUP-Virtex5 board, its invaluable.

11. 11 FCRC - June 2007 ISCA/PLDI/STOC/SIGMETRICS/others (2500 attendees) Plan on 1 day RAMP “Tutorial” XUP + RAMP CD take-homes Red/White/Blue demos hands-on build your own RAMP system? Sponsorship?