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Lecture 12, Slide 1EECS40, Fall 2004Prof. White Midterm 1 – Tuesday Oct. 12, 2004, 12:40-2:00. Last names beginning with A-L in F295 Haas; M-Z in Sibley Auditorium, Bechtel Center. Covers through Ch. 3, topics of HW4, concepts of first 3 labs. GSIs will review material in discussion sections this week. Bring photo-ID, no books, no cell phones, you may bring one 8-1/2 by 11 sheet of notes, you may bring a calculator, and you don’t need a blue book. Notes

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Lecture 12, Slide 2EECS40, Fall 2004Prof. White Lecture #12 OUTLINE Op-Amp circuits continued: examples Inverting amplifier circuit Summing amplifier circuit Non-inverting amplifier circuit Differential amplifier circuit Current-to-voltage converter circuit Reading Chapter 14. (Also, amplifiers are discussed in great detail in Ch. 11)

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Lecture 12, Slide 3EECS40, Fall 2004Prof. White Negative feedback is used to “linearize” a high-gain differential amplifier. V0V0 + V+V+ VV V 0 (V) 5 55 Without feedback V0V0 + V IN 1 2 3 V0V0 1 2 3 4 5 4 5 Review: Negative Feedback With feedback

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Lecture 12, Slide 4EECS40, Fall 2004Prof. White Application of Voltage Follower: Sample and Hold Circuit

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Lecture 12, Slide 5EECS40, Fall 2004Prof. White Inverting Amplifier Circuit +–+– +vo–+vo– –+–+ vsvs RsRs RfRf inin i n = 0 i s = -i f v p = 0 v n = 0 +vp–+vp– +vn–+vn– isis ifif

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Lecture 12, Slide 6EECS40, Fall 2004Prof. White Analysis using Realistic Op Amp Model In the analysis on the previous slide, the op amp was assumed to be ideal, i.e. R i = ; A = ; R o = 0 In reality, an op amp has finite R i, finite A, non- zero R o, and usually is loaded at its output terminals with a load resistance R L.

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Lecture 12, Slide 7EECS40, Fall 2004Prof. White Summing Amplifier Circuit +–+– +vo–+vo– –+–+ vcvc RcRc RfRf inin +vp–+vp– +vn–+vn– icic ifif ibib iaia –+–+ vbvb –+–+ vava RbRb RaRa i n = 0 i a + i b + i c = -i f v p = 0 v n = 0 superposition !

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Lecture 12, Slide 8EECS40, Fall 2004Prof. White A DAC can be used to convert the digital representation of an audio signal into an analog voltage that is then used to drive speakers -- so that you can hear it! 00 1 01 00 11 0 1 00 1.5 2 0 1 1 0 0 111 1 000 2.5 3 3.5 4 1 00 1 1 0 1 0 11 11 00 11 0 1 111 0 1111 4.5 5 5.5 6 6.5 7 7.5 Binary number Analog output (volts) 0000 000 1 0.5 MSB LSB S1 closed if LSB =1 S2 " if next bit = 1 S3 " if " " = 1 S4 " if MSB = 1 4-Bit D/A 8V + V0V0 5K 80K 40K 20K 10K S1 + -+ - S3 S2 S4 + Application: Digital-to-Analog Conversion “Weighted-adder D/A converter” (Transistors are used as electronic switches)

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Lecture 12, Slide 9EECS40, Fall 2004Prof. White Digital Input 0 1 2 3 4 5 6 7 8 0246810121416 Analog Output (V) 1111 1000 0100 0000 0001 Characteristic of 4-Bit DAC

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Lecture 12, Slide 10EECS40, Fall 2004Prof. White Noninverting Amplifier Circuit +–+– +vo–+vo– –+–+ vgvg RgRg RfRf i p = 0 v p = v g v n = v g i n = 0 R s & R f form a voltage divider + vpvp – RsRs + vnvn – inin ipip

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Lecture 12, Slide 11EECS40, Fall 2004Prof. White Differential Amplifier Circuit +–+– +vo–+vo– –+–+ RbRb inin +vp–+vp– +vn–+vn– vbvb –+–+ vava RcRc RaRa i n = 0 i p = 0 RdRd ipip

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Lecture 12, Slide 12EECS40, Fall 2004Prof. White More usual version of differential amplifier (Horowitz & Hill, “Art of Electronics”, p. 184-5 (part of their “smorgasbord” of op-amp circuits): Let R a = R c = R 1 and R b = R d = R 2 Then v 0 = (R 2 / R 1 )(v b – v a ) To get good “common-mode rejection” (next slide) you need well-matched resistors (R a and R c, R b and R d ), such as 100k 0.01% resistors Differential Amplifier (cont’d)

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Lecture 12, Slide 13EECS40, Fall 2004Prof. White Differential Amplifier – Another Perspective Redefine the inputs in terms of two other voltages: 1. differential mode input v dm v b – v a 2. common mode input v cm (v a + v b )/2 so that v a = v cm – (v dm /2) and v b = v cm + (v dm /2) Then it can be shown that “common mode gain”“differential mode gain”

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Lecture 12, Slide 14EECS40, Fall 2004Prof. White Differential Amplifier (cont’d) An ideal differential amplifier amplifies only the differential mode portion of the input voltage, and eliminates the common mode portion. –provides immunity to noise (common to both inputs) If the resistors are not perfectly matched, the common mode rejection ratio (CMRR) is finite:

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Lecture 12, Slide 15EECS40, Fall 2004Prof. White Op-Amp Current-to-Voltage Converter

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Lecture 12, Slide 16EECS40, Fall 2004Prof. White Summary Voltage transfer characteristic of op amp: A feedback path between an op amp’s output and its inverting input can force the op amp to operate in its linear region, where v o = A (v p – v n ) An ideal op amp has infinite input resistance R i, infinite open-loop gain A, and zero output resistance R o. As a result, the input voltages and currents are constrained: v p = v n and i p = -i n = 0 vovo vp–vnvp–vn V cc -V cc slope = A >>1 ~1 mV ~10 V

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Lecture 12, Slide 17EECS40, Fall 2004Prof. White

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Lecture 12, Slide 18EECS40, Fall 2004Prof. White

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Lecture 12, Slide 19EECS40, Fall 2004Prof. White

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Lecture 12, Slide 20EECS40, Fall 2004Prof. White Differentiator (from Horowitz & Hill)

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Lecture 12, Slide 21EECS40, Fall 2004Prof. White Op-Amp Imperfections Discussed in Hambley, pp. 651-665 (of interest if you need to use an op-amp in a practical application!) Linear range of operation: Input and output impedances not ideal values; gain and bandwidth limitations (including gain-bandwidth product); Nonlinear limitations: Output voltage swing (limited by “rails” and more; output current limits; slew-rate limited (how fast can the output voltage change); full-power bandwidth DC imperfections: Offset current (input currents don’t sum exactly to zero); offset voltage;

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