1. Embedded Systems in Silicon TD5102 Henk Corporaal http://www.ics.ele.tue.nl/~heco/courses/EmbSystems Technical University Eindhoven DTI / NUS Singapore 2005/2006

2. H.C. TD51022 Goal Special emphasis on: –efficient data management for high performance and low power –the exploitation of parallelism at instruction and task level –platforms processor components in particular RISC and VLIW architectures and accelerators –FPGA design flow Treating how to design and map applications efficiently on future programmable platforms

3. H.C. TD51023 What is System Design ? AlgorithmsData Structures+ ARM IP 1 IP 2 RAMROM Architecture RAM ROM MMU custom logic DSP ROM micro processor

4. H.C. TD51024 What do you learn? a methodology for a step-wise (code) transformation and mapping trajectory going from an initial specification to an efficient and highly tuned platform implementation what is a RISC architecture, how is it implemented? what are ILP architectures and how do they operate? –In particular about VLIW type of architectures code generation principles implementation design flow FPGA architecture details

5. H.C. TD51025 Topics details Design flow overview System Specification Data Management Exploitation of Operation Parallelism (e.g. ILP code generation) Task Concurrency Management MIPS processor design Future Processing Platforms components like VLIWs SystemC

6. H.C. TD51026 When and where Everyday 12 * 3 hours Dec 5 – Dec 16, Jan 5, 6 Time –18.00 – 21.00 h Place –E4-04-05 (Dec) / E4-04-06 (Jan)

7. H.C. TD51027 Proposed course schedule 1.Introduction + Overview 2.RISC architectures: MIPS ISA (instruction set architecture) handout Lab 1: MIPS assembly programming 3.MIPS implementation (1) and SystemC 4.MIPS implementation (2) handout Lab 2: MIPS implementation 5.FPGA architecture, design flow and tool chain handout Lab 3: FPGA circuit design and EDK toolflow 6.Data Management (1) including Loop Transformations 7.Data Management (2) handout Lab 4: Optimizing Data Memory Hierarchy use 8.Platforms and ILP architectures 9.Code generation 10.Code generation 11.Other architectures including TTAs 12.Wrap up

8. H.C. TD51028 Labs MIPS assembly programming –use of SPIM MIPS implementation –use of mmMIPS and mMIPS –SystemC (see www.systemc.org) FPGA design flow and fast prototyping –design a simple circuit –perform the EDK tutorial Optimizing a C application for efficient use of processor memory hierarchy

9. H.C. TD51029 Miscellaneous Material –Slides –Papers –Your own notes –Book: Patterson and Hennessy Computer Organization and Design (3 nd Edition) Examination (oral, 11-12 Jan 2006) –Final examination 50 % –Lab. Exercises 50 % (have to write and defend lab report)