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Fast Force-Directed/Simulated Evolution Hybrid for Multiobjective VLSI Cell Placement Junaid Asim Khan Dept. of Elect. & Comp. Engineering, The University.

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Presentation on theme: "Fast Force-Directed/Simulated Evolution Hybrid for Multiobjective VLSI Cell Placement Junaid Asim Khan Dept. of Elect. & Comp. Engineering, The University."— Presentation transcript:

1 Fast Force-Directed/Simulated Evolution Hybrid for Multiobjective VLSI Cell Placement Junaid Asim Khan Dept. of Elect. & Comp. Engineering, The University of British Columbia, Vancouver, BC, Canada. junaidk@ece.ubc.ca Dr. Sadiq M. Sait Dept. of Comp. Engineering, King Fahd University of Petroleum & Minerals, Dhahran, Saudi Arabia. sadiq@ccse.kfupm.edu.sa

2 Introduction Standard Cell Placement Assigning modules to locations on the silicon surface An Intractable problem Numerous Design Objectives, wire-length, power dissipation, delay etc. One Solution To use Iterative Heuristics e.g., Simulated Annealing, Genetic Algorithm, Tabu Search, Simulated Evolution etc.

3 Simulated Evolution An excellent heuristic for placement Both, solution quality, and run time, are better than other approaches If used with fuzzy logic, can optimize multiple objectives Problem: For large VLSI circuits, needs to be accelerated Solution Parallelization Hybridize with Force Directed Algorithm

4 Simulated Evolution, Basic Steps Comprises three step Selection Evaluation Allocation

5 Simulated Evolution: Algorithm Algorithm Simulated_Evolution( B, Sol initial, Stopping Criteria ) B = Bias ValueSol = Complete Solution m i = Module Ig i = Godness of m i ALLOCATE( m i, Sol i ) = Function to allocate m i in partial solution Sol i Begin Repeat S = {} EVALUATION: ForEach m i in Sol evaluate g i SELECTION: ForEach m i in Sol DO begin IF Random > min (g i,1) THEN begin S = S U m i Remove m i from Sol end Sort the element of S ALLOCATION: ForEach m i in S DO begin ALLOCATE ( m i, Sol i ) end Until Sopping Condition is satisfied Return Best Solution End (Simulated Evolution)

6 Evaluation

7 Selection

8 Allocation Previous Approaches (e.g. BLFSE) 1. Sort selected cells in descending order of their goodness 2. Pick the top of the list cell 3. Swap its location with other cells in the list 4. Accept the best swap 5. Remove the cell from sorted list 6. Go to 2 Problem O(n 2 ) time complexity for Allocation n is the number of selected cells In VLSI n is too large and hence a O(n 2 ) is not practical

9 Force-directed Allocation Solution Use Force-directed heuristic to find best x and y locations for a cell y position indicates the best row, the row nearest to y position is selected, which satisfies the width constraint x position indicates the exact location of the cell in the selected row The selected x position may replace some already well placed cell and hence introduce hill climbing Benefit Needs only O(n) time Because x and y locations can be found in O(1)

10 Force-directed ALLOCATION Method Problem To find w ij that satisfies multiple objectives Solution Use Fuzzy Logic

11 Fuzzy weights Following fuzzy rule is used to find weights IF a net is good in wire-length AND good in power AND good in delay THEN it has a low weight A goodness g ij for the net ij in the range [0,1] is found and then w ij is calculated as w ij = 1 – g ij Higher the goodness lower is the weight

12 Fuzzy weights (Membership functions) 1.0 a min_ w a max_w X ijw awaw Near optimal wirelength 1.0 a min_p a max_p X ijp apap Near optimal power 1.0 a min_net a max_net X ijnet  a net Near optimal net-delay 1.0 2.0 X ijpath  a path T max (ij) is much smaller than T max

13 Fuzzy weights Using AND and OR like Fuzzy aggregation functions and the fuzzy rule we calculate g ij as follows And hence w ij = 1 - g ij

14 Experiments and Results Fast Fuzzy Force Directed Simulated Evolution (FFSE) is compared with Biasless Fuzzy Simulated Evolution (BLFSE) 12 ISCAS benchmark circuits are used FFSE is same as BFSE except Allocation For BLFSE execution is aborted when there is no improvement in last 500 iterations FFSE is run for fixed 5000 iterations 0.25 micron technology is used

15 Experiments and Results CircuitBLFSEFFSE # of cells L (m)P (m) D (ps)T (s) L (m)P (m) D (ps)T (s) S29813645489151394649759991354.8 S38617283572036203117942221692136.8 S83231023140525141619226112586340011 S64143312811307268717512485289767424 S95344029576502522335129988468324417 S12385404131812303363699413621293437720 S11965613581011276360613382821236335022 S333019611832882479745953511637562411248387 S53782993326840483604351182324372141560376149 S92345844UH 655370114231908440 S132078651UH 13398371441891604885 S1585010383UH 147766211504920061202 UH: Unreasonably high run time

16 Experiments and Results 020040060080010001200 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Execution time in seconds Overall membership of the solution

17 Experiments and Results 020040060080010001200 2 3 4 5 6 7 x 10 6 Execution time in seconds Wire Length Cost (  m)

18 Experiments and Results 020040060080010001200 2000 3000 4000 5000 6000 7000 8000 Execution time in seconds Delay Cost (ps)

19 Experiments and Results 020040060080010001200 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 x 10 5 Execution time in seconds Power Dissipation Cost (  m)

20 Conclusion A Fast Fuzzy Force Directed Simulated Evolution Algorithm for VLSI standard cell placement was proposed FFSE is capable of optimizing multiple objectives Allocation was speedup from O(n 2 ) to O(n) FFSE performs much better than BLFSE in terms of execution time There is not much performance degradation in terms of solution quality In contrast to BLFSE, FFSE can be used for large circuits

21 Thank You Questions ?


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