1. Prof. Z Ghassemlooy ICEE2006, Iran Investigation of Header Extraction Based on Symmetrical Mach-Zehnder Switch and Pulse Position Modulation for All-Optical Packet-Switched Nnetworks Z. Ghassemlooy, H. Le Minh, and Wai Pang Ng Optical Communications Research Group Northumbria University, UK http://soe.unn.ac.uk/ocr/

2. Contents  Overview of header processing in optical networks  Header processing based on pulse-position modulation (PPM) and the proposed node architecture  Header extraction module (HEM)  Simulation results: HEM, Node and Network Performances  Summary

3. Optical Communication Network (OCN)  Solution: All-optical processing & switching  Photonic network 1P 100T 10T 1T 100G 10G 1G 100M 1995 2000 2005 2010 Year Demand traffic [bit/s] Voice Data Total NEC-2001 - Future OCNs: faster signal processing and switching to cope with the increase of the demanding network traffic - Existing OCNs: depends on electronic devices for processing the packet address to obtain the routing path. However, the limitation of electronic response will cause the speed bottleneck

4. Future OCNs Optical transparent path - Future OCN will have the processing and switching data packets entirely in optical domain, i.e. generate optical transparent path for routing data packets  Require: compact and scalable processing scheme

5. Current All-optical Processing Scheme All-optical logic gates All-optical correlators Address patterns Decimal value Output ports 0 0 0Port 2 0 0 0 11Port 1 0 0 1 02Port 3 0 0 1 13Port 1 0 1 0 04Port 3 0 1 5Port 2 0 1 1 06Port 2 0 1 1 17Port 1 1 0 0 08Port 3 1 0 0 19Port 2 1 0 Port 2 1 0 1 111Port 3 1 1 0 012Port 1 1 1 0 113Port 1 1 1 1 014Port 2 1 1 15Port 1 Routing table (RT) Example: N = 4, node with M = 3 ? Port 1 Port 2 Port 3 N-bit Problems: Large size routing table  increased processing time Optical device complexity  poor scalability Solution: Reduce the size of the routing table

6. Proposed Node with PPM Processing Clock extraction: synchronize the arrival of data packet and the node processing S-P converter: convert the serial address bits to parallel bits PPM-ACM: (PPM address conversion module): convert binary address to the PPM-converted address PPRT: store M entries (M PPM frames) Switch synchronisation: synchronise SW with data packet All-optical switch: controlled by matching signals to open the correct SW Clock extraction S-P Converter PPM-ACM & M SW1 SW2 SWM Header processing unit 1 2 M All-optical switch... Data H C lk PPRT Entry 1 Entry 2 Entry M... & 1 & 2 Switch Sync. Data H C lk H

7. PPM – Concept/Operation a 0 a 1 a 2 a 3 payload Header (packet address) Clk Data packet Address extraction PPM (a)(b) PPM-HEM No of slots = 2 M

8. PPRT Generation Is self-initialised with the extracted clock pulse. The M entries are filled by: – Single optical pulse + Array of 2 N optical delay lines; Or, – M pattern generators + M optical modulators.

9. PPM Based Routing Table  Grouping address patterns having the same output ports  Each new pulse-position routing table (PPRT) entry has optical pulses at the positions corresponding to the decimal values of group’s patterns Pulse-position routing table (N = 4, M = 3)

10. Header Correlation  Single AND operation is required for matching PPM-address and multiple address patterns (PPRT entry)  Processing-time gain: Matched

11. SMZ Based AND Gate A/B01 000 101 Implementation: Using optical interferometer configuration + optical nonlinear devices A B A×BA×B SOA1 SOA2 Symmetric Mach-Zehnder Interferometer (SMZI)

12. HEM: Serial-to-parallel Conversion (SPC) a1a1 a2a2 a3a3 a0a0 a3a2a1a0a3a2a1a0 SMZ0 SPC Clk SMZ3 SMZ2 SMZ1 1- SPC diagram 2- SMZ interferometer Problems: 1-Residual power due to large T SW 2-Low extinction ratio ~ 10 to 15 dB SOA1 SOA2 (Extracted) T SW

13. HEM: PPM-ACM 1- N-bit address-codeword: A = [a i  {0,1}], i = 0, …, N–1 2- PPM-format address: y(t) = x(t +  i a i  2 i  T s ) SPC Problem: Multiple pulse at the PCM-ACM output instead of only y(t) due to low switching extinction ratio of SW

14. HEM: PPM-ACM SW Achieved high switching extinction ratio for SW (>30 dB) Solution: Combine 2 SMZs in their complement switching modes by single control pulse 1- SMZ1 in ON state  SMZ2 in OFF state 2- SMZ1 in OFF state  SMZ2 in ON state

15. Hall-Optical Switch 1 M1 M SMZ-1 SMZ-2 SMZ-M … CP1 CP2 CPM 1 2 M

16. Simulation Results – HEM Performance ParametersValuesParametersValues SOA length – L SOA 500  10 -6 m Carrier density transparency 1.4  10 24 m -3 SOA width 3  10 -6 m Recombined Const. A 1.43  10 8 s -1 SOA height 80  10 -9 m Recombined Const. B 1  10 -16 m 3 s -1 Linewidth enhancement4Recombined Const. C 3  10 -41 m 6 s -1 Confinement factor0.15Initial carrier density 3  10 24 m -3 Differential gain 2.78  10 -20 m 2 Injected current150 mA Internal losses 40  10 2 m -1 Group velocity – V g 3  10 8 / 3.5 ms -1 SOA parameters Packet parameters ParametersValuesParametersValues Number of bits in the header N4Bit rate of the data packet80 Gb/s Data pulse width FWHM1 psPPM slot duration T s 6.25 ps

17. Simulation Results – HEM Performance SPC The PPM-ACM extinction ratio between y(t) power and undesired multiple-pulse at PPM-ACM output against T sw for the best and worst cases (among 2 N ) This ratio ~ 30 dB for T SW = 1ps

18. Simulation Results – Node Performance Simulation parameters Values Address length N5 Number of outputs M3 Bit rate50 Gb/s Payload16 bits Packet gap2 ns Pulse width FWHM1 ps Pulse’s power peak2 mW Wavelength1554 nm PPM slot duration T s 5 ps For an all-optical core network up to 2 5 = 32 nodes

19. Simulation Results – Node Performance Demonstrate the PPM processing and Tx modes PPRT with 3 entries:

20. Simulation Results – Node Performance Input Output 1 Output 2 Output 3 Port 1 Port 2 Port 3 Input

21. Simulation Results – Node Performance 0 1 1 1 0 Packet with address 01110 PPM-converted address PPRT entry 1 Synchronized matching pulse

22. Simulation Results – Network Performance 1- Multiple-hop OSNR 2- Predicted & simulated OSNRs

23. Conclusions PPM processing scheme – Reduces the required processing time – Provides the scalability: adding/dropping network nodes and node outputs Applications: – All-optical core/backbone networks (N > M ~ 3-6) – Optical bypass router (electrical router + optical bypass router) Challenges: – Optical switch with long and variable switching window – Timing jitter and received pulse dispersion

24. Acknowledgements  Northumbria University for sponsoring the research work

25. Thank You!

26. Node with Multicast Tx Mode Clock extraction S-P Converter PPM-ACM & M SW1 SW2 SWM Header processing unit 1 2 M All-optical switch... Data H C lk PPRT Entry 1 Entry 2 Entry M... & 1 & 2 Switch Sync. Data H C lk H Data H C lk