1. µBITS Chris Page Peter Gimeno Christina Williams Greg Weatherford Christopher Howard Micro Blind Interactive Touch Screen

2. µBITS Purpose  To give the blind the capability to interface with a computer and the internet.  To create a pin bed that can display scrolling, Braille characters, ASCII characters, a few Japanese characters and simple monochromatic images.  To create a pin bed that is compact and more portable than current Braille books.  With a flexible I/O interface capable of USB and PS/2

3. µBITS Presentation Overview  Requirements and Standards  Block Diagram  Digital Design Process  Software  Analog Design Process  Interface between D/A  Schedule/Division of labor  Cost  Questions, Comments?

4. µBITS Product Overview  A three dimensional display board.  Designed for use by the blind.  Capable outputting multiple character sets  Flexible I/O interface  Integrated Keyboard Support (USB or PS/2)  Software designed to support up to a 320x240x8 pin display.  Compact

5. µBITS Initial Requirements – Environmental Standards  Operation at standard room temperatures.  Safe for end user operation.  Compliant with FCC standards.  Safe for pacemaker users.

6. µBITS Initial Requirements - Performance Standards  CPU Capable of image/video decoding.  512Kb of frame backing/character lookup memory. (Was 2Mb)  3Mb of CPU memory. (Was 4Mb)

7. µBITS Initial Requirements – Interface Standards  P/S 2 keyboard input  Pin Grid Output  2 General purpose I/O inputs  Capable of supporting USB, IDE, Digital Cameras, serial, and many other popular input methods.

8. µBITS Block Diagram Power supply DC –DC converters Processor CY7C67200 50 MHz GCC programmable Memory 3Mb SRAM Memory 512Kb SRAM Frame Buffer and Character Lookup Table Pin Grid FPGA Display Driver I/O Controller Future Expansion Future I/O Expansion Analog Display Driver P/S 2 Input

9. µBITS Nesting Diagram FPGA Board (PGGU) CPU Board (CIB) Pin Grid Driver Board (PGD) PGGU VRAM Board (VRAM) Analog Power Supply Digital Power Supply

10. µBITS

11. Board Features  IDE/GPIO interface  Direct RAM communication with FPGA  Serial Debug Interface  LED Status Indicators  Overcurrent and Undervoltage CPU Protection  HSSI  2 independent USB data and power busses  Prominent Reset Button

12. µBITS Design Demo

13. µBITS Digital Progress Determined Specification Details Part selection Schematic Capture Schematic Review Layout  Board Manufacturing  Board Electrical Test  Board Population  Board Operational Testing  Software

14. µBITS Proposed Software Diagram Decoder SRAM Receiver VRAM Driver SRAM Driver Braille LUT PS/2 Driver USB HID Device (Keyboard) Display Driver SRAM Encoder Font LUT Image Processing USB Driver (serial) USB Driver (HID) Data (computer) FPGA HDLCPU PS/2 Keyboard Display

15. µBITS SRAM Timing Diagram

16. µBITS PS/2 Timing Diagram

17. µBITS PS/2 Receiver Flowchart

18. µBITS VRAM Driver Flowchart

19. µBITS SRAM/FPGA Data Transfer  128 addressable bytes  Byte 0 is command byte  Byte 127 is status byte  Bytes 120-126 are pin grid display mode registers.  Bytes 1-10 are Data bytes

20. µBITS Current Digital Issues  Communication Protocols  HDL Way Behind Schedule  NO PROJECT SOFTWARE HAS BEEN WRITTEN YET!  Data Representation  Group Communication

21. µBITS Analog over view  Progress  Design  Prototype Design Details  Ideas that didn’t work  Problems/solutions  Current problems  Future Goals

22. µBITS Analog Progress Tested pin elevation techniques Designed three character Braille board Cut Braille board on Laser cutter in ITLL Chose and modified power supply for Braille board Designed schematic for Braille board Tested Design Begin building three character Braille board

23. µBITS Failed Idea: High-Z DeMUX Decoder  Requires a high refresh rate for even small designs  Solenoids are limited to roughly a 30 Hz refresh rate  For 100 pins, this would take over 3 seconds to refresh each pin  Since the pin is only active for this brief refresh period, gravity does becomes an issue Decoder FPGA Outputs 1 Z Z Z 0

24. µBITS Promising Design: M&M (MUX Memory)  More complex then High-Z DeMUX design  Memory will allow pins to remain elevated  Eliminates possible problems with surrounding pins FPGA DEMUX Memory Current Driver Outputs Reset Clock Pin Grid

25. µBITS Analog Design (LPBB): Actual Pin Board Design  (From PDR) We are looking to modulize each 2x3 section.  We did not modulize because we are dealing with a low amount of characters (only 2-3 char.)  (From PDR) The pins will meet Braille specifications.  We did not meet the Braille specifications but we accomplished to be off only be approx. 0.05” between characters. 0.200” 0.20” 0.02” to 0.05” Distance between each Braille module = 0.6” Pin 6 - Capitalization Pins 2, 3, 4 – Full Character

26. µBITS Analog Design : First Prototype  Will be a 2x3 board. (one Braille character)  Need to test board dimensions.  Will use magnetic elevation (ME).  Need to know wrapping to current ratio.  Size of pins needed.  Will use one of the pin addressing designs.  Depends on if High Z MUX will perform as expected within a reasonable cost.  Will not be connected to FPGA, will simulate FPGA output.

27. µBITS Analog Design : Prototype Checklist  Pin has to elevate to correct height.  Record winding to current ration for correct height.  Pin has to stay elevated at correct height for specific amount of time.  Touching our display will not cause harm to the person.  Measured operating characteristics of each solenoid  Up to 12V  0.3 to 1 Amp  30 Hz or less

28. µBITS Analog Design : Current Design  Can display 5 Braille characters  Uses magnetic elevation (ME)  Due to the size of the solenoids, a multi level design was used  Uses Direct Pin Addressing  Has yet to be connected to the FPGA  Can still be operated manually

29. µBITS Analog Schematic For the 3 character Braille board

30. µBITS Analog Components For the 3 character Braille board  Power supply, can supply up to 20 A @ 5V  Voltage Regulator  560  1/4 Watt resistor  1.1K  1/4 Watt resistor  2N3055 Power transistor  2N2222A NPN transistor 600mA @6V DC continuously  18 Solenoid actuators. 10 ohms,.3A @2.3V continuously  Plastic board to hold the assembly, 4 layers.  2 of 0.13” bolts to hold assembly together.  10 of 0.13” nuts to hold the levels in place on the assembly  18 of 0.025” sewing pins with flat tops.  18 1K  1/8 watt resistors to current limit the FPGA

31. µBITS Voltage regulator, Single pin for the 3 Character Braille board

32. µBITS Analog Design : Issues that have been Addressed  Layout Board  Record list of manufactures and stores needed.  Solenoids will be purchased rather then made  Begin tests of layout board  Looked specifically at:  Pin addressing  Pin Board Layouts / Designs  People contacted for input or design issues  Lucy Pao – CU  Gagandeep Lamba – CU

33. µBITS Analog Design : Issues to be Addressed  Programming the FPGA  Learning Verilog and programming a PS/2 interface  Building the ‘Blow Out’ Circuitry between the FPGA and the Pin Board  Safety precaution to prevent damage to FPGA I/O ports  Practical 3D designs

34. µBITS Analog Ideas that didn’t work  Using a capacitor to make the actuator have more current for the first ms. The time period is too long, the cap would have needed to be too big.  Magnetic pin elevation  Memory Metal pin elevation  Bimetallic pin elevation  Bobbin and drill for wrapping coils.

35. µBITS Analog Problems/ Solutions Problems The actuators would move around inside the plastic sheet so much that they would become un-square and the pin wouldn’t come out. Solutions Cut the board out of a thick sheet of plastic to hold the actuators in place. The Pins on the actuators don’t always come up without help from the user Build the 3 character Braille only board so that the pins can never fall more than 10% out side of the actuator. How do we keep the magnetic pins from interfering. Use an actuator solenoid A 1watt resistor for each actuator takes up to much space Design a Voltage regulator to lower the voltage one final time. It is difficult and time consuming to uniformly wrap 400 turns of 36 Gauge wire in less than 0.16” diameter Purchase Actuator solenoids.

36. µBITS Future Goals  Interface three character Braille board to the Ps/2 keyboard  Test three more possible methods of 3-D pin elevation  Magnetic pins with Aluminum collars  Linear motors  Drop pins through coils.  Choose elevation method then design 100 pin board.  Purchase parts for 100 pin board  Build 100 pin board  Interface 100 pin board to CPU board

37. µBITS Analog Design : Next Steps (Prototype and Beyond)  Layout Board  Record list of manufactures and stores needed.  Wrapping solinoids.  Begin tests of layout board  Looking specificly at:  Scrolling  Pin addressing  Current Contacts to work with us  Lisa Pao - CU  NIST Researchs of Tactile Board  -

38. µBITS Interface between Digital and Analog  Progress  Ideas  Future Goals

39. µBITS Interface progress  Tested Mux matrix idea (did not work)  Learning Verilog to program firm ware for interface.(in progress)  Come up with possible design

40. µBITS Analog Design : Ideas for Implementation  Pin Addressing  High-Z MUX Decoder  Not very compatible with our design  Direct Pin Addressing

41. µBITS Serial to Parallel conversion  Accepts serial data from one I/O port on the FPGA which would then be used to send the correct voltage to multiple pins.  We would still need many S to P chips to address all the pins in the 100 pin bed.

42. µBITS Interface Future Goals  Select components for S to P idea  Build S to P prototype and test it.  Assemble final S to P interface for 100 pin bed.

43. µBITS Schedule and Division of labor

44. µBITS Cost Estimate  FPGA development board: $175  Computer PCB: $350  PCB components $300.00  Three character Braille pin bed $30.00  100 pin bed $200.00  Digital-Analog Components: $50

45. µBITS Questions, Comments?