2. Data Manipulation Computer System consists of the following parts:
Central Processing Unit (CPU)
Memory
Input Units(I/P)
Output Units(O/P)
I/P
CPU
O/P
Memory
Computer System

3. I/O Generalized Microcomputer Structure PC I R Memory MAR Control
Addressing
Registers
Control
I R
Arithmetic
A Reg
ALU
Input Bus
Output Bus
To MAR
To Mem
To I/O

4. Central Processing Unit (CPU) :
Control Unit:
Transfer data from main memory into registers
Inform ALU which registers hold the data
Activate the appropriate circuitry within ALU
Tell ALU which register should receive the result
Control the timing activities of computer system
CPU Consists of :
Control Unit
Arithmetic Logic Unit (ALU)
Registers

5. CPU : Arithmetic Logic Unit (ALU) :
Contains the circuitry that performs data manipulation
The source of data to ALU either the registers inside CPU , the memory , or input from input units
Registers :
Registers are small and fast storage units
Registers are used for temporary storage of information
Registers are divided into:
General -Purpose Registers
Special -Purpose Registers

6. Memory: Memory is 4 levels from the point of Speed and Price :
Cache Memory
Registers
Main Memory
Mass Storage (secondary Memory)
CPU
Registers
Cache Memory
Main Memory
Mass Storage

7. Cache Memory :
Cache Memory is a high-speed memory with response times similar to that of CPU registers
It is often located inside the CPU itself
The computer keeps in it a copy of the portion of the main memory that is needed frequently
Thus, data transfer that normally made between registers and main memory are made between registers and cache memory

8. CPU / Memory Interface:
For the purpose of transferring bit patterns between a machine’s CPU and main memory , these units are connected by a collection of wires called a bus
Computer system contains 3 types of buses:
Data Bus
Address Bus
Control Bus

9. Machine Instructions :
They are quite short bit pattern instructions, a typical CPU must be able to follow to perform certain tasks
The machine instructions are classified into three categories:
Data Transfer Instructions
Arithmetic/Logic Instructions
Control Instructions

10. Program Execution :
Computer follows a program stored in its memory by copying the instructions from memory into the the control unit as needed
The instruction execution passes through three phases:
Fetch Cycle
Decode Cycle
Execution Cycle

11. Fetch Cycle I/O 156C PC 2A I R 1 56C Memory MAR Control Addressing
Registers
Control
I R
Arithmetic
A Reg
ALU
Input Bus
Output Bus
To MAR
To Mem
To I/O 2A
156C
1 56C
Fetch Cycle

12. Fetch Cycle I/O 156C PC=PC+1 2B=2A+1 I R 1 56C Memory MAR Control
Addressing
Registers
Control
I R
Arithmetic
A Reg
ALU
Input Bus
Output Bus
To MAR
To Mem
To I/O
2B=2A+1 2A
156C
1 56C

13. Decode Cycle Load into Reg 5 from RAM I/O Op Code Operand PC I R 2B 6C
Memory
MAR PC
Addressing
Registers
Control
I R
Arithmetic
A Reg
ALU
Input Bus
Output Bus
To MAR
To Mem
To I/O 2B 6C 96
1 56C 2A
Op Code
Operand
Decode Cycle
156C
Reg 5

14. Execute Cycle Load into Reg 5 from RAM address 6C I/O Op Code Operand
Memory
MAR PC
Addressing
Registers
Control
I R
Arithmetic
A Reg
ALU
Input Bus
Output Bus
To MAR
To Mem
To I/O 2B 6C 96 C 2A
Op Code
Operand
156C
Reg 5
Execute Cycle
Load into Reg 5 from RAM address 6C

15. Execute Cycle I/O Op Code Operand PC I R 2B 6C 96 1 56C 156C Memory 2A
MAR PC
Addressing
Registers
Control
I R
Arithmetic
A Reg
ALU
Input Bus
Output Bus
To MAR
To Mem
To I/O 2B 6C 96
1 56C
Op Code
Operand 2A
156C
Reg 5
Execute Cycle

16. Other Architectures:
Complex Instruction Set Computers(CICS) versus Reduced Instruction Set Computers(RISC)
Pipeline Architecture
Multiprocessor Architecture

17. CISC versus RISC :
The complex machines is harder and more costly to build
Perhaps costs more to operate
Many of complex insts. Can find limited applications
CISC machine contains a block of special memory cells known as micromemory
A micromemory contains a program stored in it called microprogram
The microprogram directs the fetch-decode-execute cycle of the CPU
Example of CISC are Pentium microprocessors
CISC

18. CISC versus RISC
The design of simple machine with small, well-designed instruction set
Removes the complexity involved with micromemory
Results in a simpler CPU design
Programs represented in machine language must be longer than
those in a CISC arch. because: several instructions are required to perform the complex operations represented by single instruction in CISC
Example of RISC PowerPC series developed by IBM,Apple
RISC

19. Pipeline Architecture :
Several Instructions are processed at the same time
Since the execution speed of the instruction is constant. Scientists turned to the concept of Throughput
Throughput refers to the total amount of work the machine can accomplish in a given amount of time rather than to how long it takes to do one task

20. Multiprocessor Machines:
Another approach to increase the throughput fall under Parallel Processing classification
To implement the parallel concept there are several approaches:
Attach several processing units, each resembling the CPU in a single processor machine. This results in three types:
SISD(Single Instruction Single Data)
SIMD(Single Instruction Multiple data)
MIMD(Multiple Instruction Multiple Data)
To have a large machine with several machines , each has its own memory and CPU.

21. Arithmetic Logic Instructions :
They are arithmetic, logic, and shift operations
Examples of logic: AND, OR, XOR
The use of AND operation is an example of the process called Masking, determining which part of other operand will affect the result
To mask all the bits of certain byte except the third bit from right :
Original Byte
Masking Byte
Original Byte after Masking
Unmasked Bit

22. Arithmetic Logic Instructions :
The use of OR operation is also an example of the process called Masking, determining which part of other operand will affect the result
To mask all the bits of certain byte except the third bit from right :
Original Byte
Masking Byte
Unmasked Bit

23. Arithmetic Logic Instructions :
The use of XOR operation is finding the 1’s- complement
To obtain the 1’s-complement of a byte, XOR it with a byte containing 1’s:
Original Byte
XOR
’s-complement of the original
Byte

24. Shift and Rotate :
The shift and rotate are necessary operations for alignment
Alignment means preparing a byte for future use in masking operations or manipulating the mantissa or floating-point representations
Shift: Classified into Logical and Arithmetic Shift
Logical Shift: Always fills zero when shifting is performed. To perform 2-bit Shift left on the byte( ):
Original Byte
bit shift left
bit shift left

25. Shift and Rotate
Arithmetic Shift: Leaves the sign Bit Unchanged, handled through an intermediary device known as controller
Rotate: Is a circular shift, to perform 2-bit rotate left for the byte( ) :
bit rotate left
bit rotate left

26. Computer-Peripheral Communications:
The word peripheral is referred to the input/output units attached to the computer
The communication between the CPU and the peripheral devices is handled through an intermediary device known as the controller
Each controller handles communication for a particular type of peripheral device
CPU
Main Memory
Controller
Peripheral Device

27. Computer-Peripheral Comm.
The controllers are often small computers within themselves, each with its own memory circuitry and CPU performs a program directing the activities of the controller
The ability of the controller to access the main memory is called Direct Memory Access (DMA)
If a controller has DMA then the CPU ask the controller to write data to the main memory instead of it, and also can ask the controller to read data from the CPU.
CPU
DMA
Controller
Peripheral Device
Main Memory

28. CPU-Controller Communication :
Communication between a CPU and a controller is handled in much the same way as that between the CPU and main memory
In many machines, the controller is disguised as a block of main memory cells. When CPU writes a bit pattern to a memory cell within that block, it is really transferred to the controller rather than memory. This is termed Memory-Mapped I/O
CPU
Main Memory
Controller
Peripheral Device
Memory-Mapped I/O

29. Parallel and Serial Communication
Communication between portions of a computer system or between two computers takes one of two basic forms: parallel or serial
Parallel Communication : all the bits in the bit pattern are transferred at the same time, each on a separate line
Such a technique is capable of transferring data rapidly but requires a relatively complex communication path which results in the use of multiwire cables
Used for short distances communication
Serial Communication: is based on transmitting only one bit at a time
This technique tends to be slower but requires a simpler data path because all the bits are transferred over the same line, one after the other
Used for large distances communication