1. Development of Final Year projects Group Members: Prof. Suman David, Prof. Mathivanan, Prof. S.N. Bhat, Kalpana Bhat, Prof.Manu T.M, Prof. Kishore Kumar

2. List of projects: 1.VLSI Implementation of MAC. 2.VLSI Implementation Digital FIR filter 3.Implementation of CAN Protocol 4.Low Voltage Lower Power 10 Bit Pipeline ADC

3. 1.Low Voltage Lower Power 10 Bit Pipeline ADC Specification: Resolution (10 bit) Sampling Frequency : 20 Mz VDD: 1.5V or 3.3 v Tech: 0.13µ Input Voltage range <1v PSNR : >50db

4. 2. VLSI Implementation of MAC Specification: Data Size: Input(32X32),Output(64+8(Guard Bit)). Frequency of operation: 100 Mhz, Single Cycle Execution. Technology: 0.18µ CMOS. Vdd : 3.3V

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