1. Reducing Occurrences of Priority Inversion in MSoC's using Dynamic Processor Priority Assignment Mikael Collin Mladen Nikitovic Christer Norström Research Engineer, Computer Architecture Lab (CAL) Senior Lecturer, Real-Time Systems Design Lab (SDL) Department of Computer Engineering Mälardalen University, Västerås, Sweden

2. Background Interprocessor blocking and priority inversion on a shared bus in multiprocessor systems - static processor priorities - poorly assigned dynamic priorities Motivation Static - task allocation algorithms - arbitration based on application profiling Dynamic - software for run-time programming of arbiter Previous efforts Arbitration unit CPU 1 priority : high Shared resource CPU 0 priority : low Task priority : high Task priority : low

3. Proposed Solution Dynamic arbitration Solution based on a Multiprocessor System-on-a-Chip (MSoC) with a centralised scheduling unit in hardware (RTU) Processor priority information is shared by adding a priority bus between the RTU and the arbiter using “System-On-a-Chip” freedom Processor priorities recalculated whenever priority changes occur in the set of currently executing tasks Arbitration unit CPU 1 priority : low Shared resource CPU 0 priority : low Task priority : low RTU

4. Proposed Solution Dynamic arbitration Solution based on a Multiprocessor System-on-a-Chip (MSoC) with a centralised scheduling unit in hardware (RTU) Processor priority information is shared by adding a priority bus between the RTU and the arbiter using “System-On-a-Chip” freedom Processor priorities recalculated whenever priority changes occur in the set of currently executing tasks Arbitration unit CPU 1 priority : low Shared resource CPU 0 priority : high Task priority : high Task priority : low RTU

5. Benefits and Future Work Reduction of priority inversion scenarios Does not add bus traffic due to separate bus Decrease in interprocessor blocking for high priority tasks Better utilisation of task migration Formalisation of proposed solution Implement simulator for system modelling and evaluation Future Work Benefits from the proposed solution