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Thermal Design And Analysis of High Power Electronic Boards J. Collado CHT, April 13, 2000.

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Presentation on theme: "Thermal Design And Analysis of High Power Electronic Boards J. Collado CHT, April 13, 2000."— Presentation transcript:

1 Thermal Design And Analysis of High Power Electronic Boards J. Collado CHT, April 13, 2000

2 Thermal Requirements Maximum junction temperatures and dereating criteria Thermal environments in which the equipment is required to operate –Ambient temperature –Altitude/Pressure –Thermal radiation environment –Solar heat loads –Air velocity –Government specifications –Mission profile and duration Design constraints –Noise and vibration limits –Maximum allowable air exhaust temperature –Size limit –Weight limits

3 Temperature Effect on Electronic Boards

4 Governing Equations Fourier’s Law of Heat Conduction q = -kA dT/dx Integrated Equation Forms: q = (kA/L)(T 1 -T 2 ) q = G(T 1 -T 2 ) = (T 1 -T 2 )/  1-2 where:  1-2 = 1/G = R = L/kA or  1-2 = 1/G = R = LN(d 2 /d 1 )/2  Lk ( Radial ) k = material thermal conductivity (W/in-°C) G = thermal conductance (W/°C) d = equivalent diameter q ------- > o- ----/\/\/\----- o T2T2 R 1-2 A L T1T1

5 Thermal Resistance to Conduction Thermal Resistance, R (°C/Watt) R=1/G (the inverse of thermal conductance, G) R 1-2 is the resistance from point 1 to point 2 For electronic components: R 1-2 =  1-2 R j-c =  j-c Junction to Case Thermal Resistance R c-b =  c-b Case to Board Thermal Resistance R j-b =  j-b Junction to Board Thermal Resistance R j-b = R j-c + R c-b =  j-b =  j-c +  c-b

6 Thermal Resistance Equations (Cont.) Junction Temperature Calculation Thermal Via Holes Thermal Resistance L1KL1K rr   2 )ln( 12 1   )( 4 22 2 inout rrK L2L2     r2r2 r1r1 PWB L2L2 r 1 = r OUT r in = r Cu after plating r out r in

7 Typical Mounting Configuration For High Power Transistors

8 Typical Assumptions  Component case is isothermal  Board bottom is isothermal under the part  Heat sink is isothermal under the part  No convection or radiation heat transfer  Extra footprint area for PWB calculations –lead vias are defaulted to be under the part

9 Type of Electronic Packages  Through Hole Part leads pass through a circuit board e.g., DIPs, Axial Diodes, Transistors, PGAs  Surface Mount Devices (SMD) Parts leads stop at the circuit board surface e.g., SOICs, PLCCs, QFP, SOTs ·Parts leads stop at the circuit board surface ·e.g., SOICs, PLCCs, QFP, SOTs

10 Effects of Thermal Vias and Cu Pad Sizes on a Typical Transistor

11 View of High Power Board Used For Case Study

12 Effects of Thermal Vias on PWB Operating Temperature Board With Thermal Vias Board With No Thermal Vias


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