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Computer-Aided Design for Microfluidic Chips Based on Multilayer Soft Lithography Nada Amin 1, William Thies 2, Saman Amarasinghe 1 1 Massachusetts Institute.

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Presentation on theme: "Computer-Aided Design for Microfluidic Chips Based on Multilayer Soft Lithography Nada Amin 1, William Thies 2, Saman Amarasinghe 1 1 Massachusetts Institute."— Presentation transcript:

1 Computer-Aided Design for Microfluidic Chips Based on Multilayer Soft Lithography Nada Amin 1, William Thies 2, Saman Amarasinghe 1 1 Massachusetts Institute of Technology 2 Microsoft Research India International Conference on Computer Design October 5, 2009

2 Microfluidic Chips Idea: a whole biology lab on a single chip –Input/output –Sensors: pH, glucose, temperature, etc. –Actuators: mixing, PCR, electrophoresis, cell lysis, etc. Benefits: –Small sample volumes –High throughput –Low-cost Applications: –Biochemistry - Cell biology –Biological computing 1 mm 10x real-time

3 Moore’s Law of Microfluidics: Valve Density Doubles Every 4 Months Source: Fluidigm Corporation (http://www.fluidigm.com/images/mlaw_lg.jpg)

4 Moore’s Law of Microfluidics: Valve Density Doubles Every 4 Months Source: Fluidigm Corporation (http://www.fluidigm.com/didIFC.htm)

5 Current Practice: Manage Gate-Level Details from Design to Operation For every change in the experiment or the chip design: 1. Manually draw in AutoCAD 2. Operate each gate from LabView fabricate chip

6 Abstraction Layers for Microfluidics C x86 Pentium III, Pentium IV Silicon Analog transistors, registers, … Fluidic Instruction Set Architecture (ISA) - primitives for I/O, storage, transport, mixing Protocol Description Language - architecture-independent protocol description Fluidic Hardware Primitives - valves, multiplexers, mixers, latches chip 1chip 2chip 3

7 Abstraction Layers for Microfluidics Fluidic Instruction Set Architecture (ISA) - primitives for I/O, storage, transport, mixing Protocol Description Language - architecture-independent protocol description Fluidic Hardware Primitives - valves, multiplexers, mixers, latches chip 1chip 2chip 3 BioStream Language [IWBDA 2009] Contributions Optimized Compilation [Natural Computing 2007] Demonstrate Portability [DNA 2006] Micado AutoCAD Plugin [MIT 2008, ICCD 2009] Digital Sample Control Using Soft Lithography [Lab on a Chip ‘06]

8 Continuous flow of fluids (or droplets) through fixed channels [Whitesides, Quake, Thorsen, …] Pro: –Smaller sample sizes –Made-to-order availability [Stanford] –More traction in biology community Droplets vs. Continuous Flow Digital manipulation of droplets on an electrode array [Chakrabarty, Fair, Gascoyne, Kim, …] Pro: –Reconfigurable routing –Electrical control –More traction in CAD community Source: Chakrabarty et al, Duke University

9 Primitive 1: A Valve (Quake et al.) Control Layer Flow Layer

10 Primitive 1: A Valve (Quake et al.) Control Layer Flow Layer

11 Primitive 1: A Valve (Quake et al.) Control Layer Flow Layer

12 Primitive 1: A Valve (Quake et al.) Control Layer Flow Layer

13 Primitive 1: A Valve (Quake et al.) Control Layer Flow Layer pressurized control port

14 Primitive 2: A Multiplexer (Thorsen et al.) Bit 2Bit 1Bit 0 0 1 0 1 0 1 Input Output 0 Output 7 Output 6 Output 5 Output 4 Output 3 Output 2 Output 1 flow layer control layer

15 Primitive 2: A Multiplexer (Thorsen et al.) Bit 2Bit 1Bit 0 0 1 0 1 0 1 Input Output 0 Output 7 Output 6 Output 5 Output 4 Output 3 Output 2 Output 1 Example: select 3 = 011 flow layer control layer

16 Primitive 2: A Multiplexer (Thorsen et al.) Bit 2Bit 1Bit 0 0 1 0 1 0 1 Input Output 0 Output 7 Output 6 Output 5 Output 4 Output 3 Output 2 Output 1 Example: select 3 = 011 flow layer control layer

17 Primitive 2: A Multiplexer (Thorsen et al.) Bit 2Bit 1Bit 0 0 1 0 1 0 1 Input Output 0 Output 7 Output 6 Output 5 Output 4 Output 3 Output 2 Output 1 Example: select 3 = 011 flow layer control layer

18 Primitive 3: A Mixer (Quake et al.) 1. Load sample on bottom 2. Load sample on top 3. Peristaltic pumping Rotary Mixing

19 CAD Tools for Microfluidic Chips Goal: automate placement, routing, control of microfluidic features Why is this different than electronic CAD?

20 CAD Tools for Microfluidic Chips Goal: automate placement, routing, control of microfluidic features Why is this different than electronic CAD? 1. Control ports (I/O pins) are bottleneck to scalability –Pressurized control signals cannot yet be generated on-chip –Thus, each logical set of valves requires its own I/O port 2. Control signals correlated due to continuous flows  Demand & opportunity for minimizing control logic pipelined flowcontinuous flow

21 Our Paper: Automatic Generation of Control Layer

22 1. Describe Fluidic ISA

23 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA

24 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA

25 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves

26 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves

27 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing

28 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing

29 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing 4. Route valves to control ports

30 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing 4. Route valves to control ports

31 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing 4. Route valves to control ports

32 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing 4. Route valves to control ports 5. Generate an interactive GUI

33 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing 4. Route valves to control ports 5. Generate an interactive GUI

34 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing 4. Route valves to control ports 5. Generate an interactive GUI

35 Our Paper: Automatic Generation of Control Layer 1. Describe Fluidic ISA 2. Infer control valves 3. Infer control sharing 4. Route valves to control ports 5. Generate an interactive GUI

36 1. Describe a Fluidic ISA Hierarchical and composable flow declarations Sequential flow P 1  P 2 AND-flow F 1 Λ F 2 OR-flow F 1 \/ F 2 Mixing mix(F) Pumped flow pump(F) P 1 P 2 F1F1 F2F2 F1F1 F2F2 or F F F1F1 F2F2

37 1. Describe a Fluidic ISA

38 mix-and-store (S 1, S 2, D) { 1. in 1  top  out 2. in 2  bot  out 3. mix(top  bot-left  bot-right  top) 4. wash  bot-right  top  bot-left  store } 50x real-time

39 2. Infer Control Valves

40

41

42 3. Infer Control Sharing

43

44

45

46

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48

49

50

51 Column Compatibility Problem - NP-hard - Reducible to graph coloring

52 3. Infer Control Sharing Column Compatibility Problem - NP-hard - Reducible to graph coloring

53 3. Infer Control Sharing Column Compatibility Problem - NP-hard - Reducible to graph coloring

54 3. Infer Control Sharing Column Compatibility Problem - NP-hard - Reducible to graph coloring

55 3. Infer Control Sharing Column Compatibility Problem - NP-hard - Reducible to graph coloring

56 4. Route Valves to Control Ports Build on recent algorithm for simultaneous pin assignment & routing [Xiang et al., 2001] Idea: min cost - max flow from valves to ports Our contribution: extend algorithm to allow sharing – Previous capacity constraint on each edge: – Modified capacity constraint on each edge:  Solve with linear programming, allowing sharing where beneficial f 1 + f 2 + f 3 + f 4 + f 5 + f 6 ≤ 1 max(f 1, f 4 ) + max(f 2, f 3 ) + f 5 + f 6 ≤ 1

57 4. Route Valves to Control Ports Build on recent algorithm for simultaneous pin assignment & routing [Xiang et al., 2001] Idea: min cost - max flow from valves to ports Our contribution: extend algorithm to allow sharing – Previous capacity constraint on each edge: – Modified capacity constraint on each edge:  Solve with linear programming, allowing sharing where beneficial f 1 + f 2 + f 3 + f 4 + f 5 + f 6 ≤ 1 max(f 1, f 4 ) + max(f 2, f 3 ) + f 5 + f 6 ≤ 1

58 Micado: An AutoCAD Plugin Implements ISA, control inference, routing, GUI export –Using slightly older algorithms than presented here [Amin ‘08] –Parameterized design rules –Incremental construction of chips Realistic use by at least 3 microfluidic researchers Freely available at: http://groups.csail.mit.edu/cag/micado/

59 Embryonic Cell Culture Courtesy J.P. Urbanski

60 Metabolite Detector Courtesy J.P. Urbanski

61 Cell Culture with Waveform Generator Courtesy David Craig

62 Open Problems Automate the design of the flow layer –Hardware description language for microfluidics –Define parameterized and reusable modules Replicate and pack a primitive as densely as possible –How many cell cultures can you fit on a chip? Support additional primitives and functionality –Metering volumes –Sieve valves –Alternate mixers –Separation primitives –…

63 Conclusions Microfluidics represents a rich new playground for CAD researchers Two immediate goals: –Enable designs to scale –Enable non-experts to design their own chips Micado is a first step towards these goals –Hierarchical ISA for microfluidics –Inference and minimization of control logic –Routing shared channels to control ports –Generation of an interactive GUI http://groups.csail.mit.edu/cag/micado/ Courtesy J.P. Urbanski

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