1. ECEN 301Discussion #25 – Final Review1 DateDayClass No. TitleChaptersHW Due date Lab Due date Exam 1 DecMon25Final Review LAB 8 2 DecTue 3 DecWed26Final Review 4 DecThu 5 DecFri RecitationHW 11 6 DecSat 7 DecSun 8 DecMon27Final Review LAB 9 9 DecTue Schedule…

2. ECEN 301Discussion #25 – Final Review2 Summary Jacob 6:12 12 O be wise; what can I say more?

3. ECEN 301Discussion #25 – Final Review3 Lecture 25 – Final Review

4. ECEN 301Discussion #25 – Final Review4 Final Exam u17 – 21 December uChapters 2 – 6, 8, 13 – 15 u30 questions Ù30 multiple choice (answer on bubble sheet!) 1 point each Ù0 long answer (show your work!) 4 or 5 points each uClosed book! ÙThree 3x5 cards allowed uCalculators allowed uNo time limit uStudy lecture slides and homework

5. ECEN 301Discussion #25 – Final Review5 Final Exam Review…Overview 1.Exam 1 Review 2.Exam 2 Review 3.Binary Numbers ÙSigned & Unsigned ÙConversions 4.Logic Functions ÙConversions among 3 representations 5.Boolean Algebra 6.Combinational Logic 7.Sequential Logic 8.Digital to Analog Converters (DACs)

6. ECEN 301Discussion #25 – Final Review6 Binary Numbers – Unsigned Binary word (B): a sequence of n 1s and 0s B = b n-1 b n-2 …b 2 b 1 b 0.b -1 b -2 …b -(m-1) b -m Ù EX: B = 10100101.1001 (n = 8, m=4) Converting from binary (B) to decimal (D) B = b n-1 b n-2 …b 2 b 1 b 0.b -1 b -2 …b -(m-1) b -m D = b n-1 ·2 n-1 + b n-2 ·2 n-2 + … + b 1 ·2 1 + b 0 ·2 0 + b -1 ·2 -1 + b -2 ·2 -2 + … + b -(m-1) ·2 -(m-1) + b -m ·2 -m Binary point

7. ECEN 301Discussion #25 – Final Review7 Binary Numbers – Unsigned Example1: What is 0110101.0101 2 in decimal?

8. ECEN 301Discussion #25 – Final Review8 Binary Numbers – Unsigned Example1: What is 0110101.0101 2 in decimal? 65 4 32 1 0-2-3 -4

9. ECEN 301Discussion #25 – Final Review9 Binary Numbers – Signed 3 common representations for signed integers: 1.Sign magnitude 2.1’s compliment 3.2’s compliment Most common for computers

10. ECEN 301Discussion #25 – Final Review10 Binary Numbers – Sign-Magnitude Range: Representations Ù01111 binary => 15 decimal Ù11111=> -15 Ù00000=> 0 Ù10000=> -0 Problem ÙDifficult addition/subtraction check signs convert to positive use adder or subtractor as required ÙHow to add two sign-magnitude numbers? Ex: 1 + (-4) The MSB encodes the sign: 0 = + 1 = 

11. ECEN 301Discussion #25 – Final Review11 Binary Numbers – 1’s Complement Range: Representations Ù00110 binary => 6 decimal Ù11001=> -6 Ù00000=> 0 Ù11111=> -0 Problem ÙDifficult addition/subtraction no need to check signs as before cumbersome logic circuits end-around-carry ÙHow to add to one’s complement numbers? Ex: 4 + (-3) To negate a number, Invert it, bit-by-bit. MSB still encodes the sign: 0 = + 1 = 

12. ECEN 301Discussion #25 – Final Review12 Binary Numbers – Two’s Complement Range: Representation: ÙIf number is positive or zero, normal binary representation, zeroes in upper bit(s) ÙIf number is negative, start with positive number flip every bit (i.e., take the one’s complement) then add one 00101 (5) 01001 (9) 11010 (1’s comp)(1’s comp) +1+1 11011 (-5)(-9) 10110 10111 MSB still encodes the sign: 0 = + 1 = 

13. ECEN 301Discussion #25 – Final Review13 Binary Numbers – Signed Example2: What is the 2’s complement of 0110101 2 ?

14. ECEN 301Discussion #25 – Final Review14 Binary Numbers – Signed Example2: What is the 2’s complement of 0110101 2 ? 0110101 (53) 1001010 (1’s comp) + 1 (add 1) 1001011 (-53)

15. ECEN 301Discussion #25 – Final Review15 Binary Numbers – Decimal to Binary Positive numbers Œ start with empty result  if decimal number is odd, prepend ‘ 1 ’ to result else prepend ‘ 0 ’ Ž divide number by 2, throw away fractional part (INTEGER divide)  if number is non-zero, go back to  else you are done Negative numbers  do above for positive version of number and negate result.

16. ECEN 301Discussion #25 – Final Review16 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation

17. ECEN 301Discussion #25 – Final Review17 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951

18. ECEN 301Discussion #25 – Final Review18 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 Integer division by 2: 195/2 = 97.5 → 97

19. ECEN 301Discussion #25 – Final Review19 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 480 Integer division by 2: 97/2 = 48.5 → 48

20. ECEN 301Discussion #25 – Final Review20 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 480 240 Integer division by 2: 48/2 = 24

21. ECEN 301Discussion #25 – Final Review21 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 480 240 120 Integer division by 2: 24/2 = 12

22. ECEN 301Discussion #25 – Final Review22 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 480 240 120 60 Integer division by 2: 12/2 = 6

23. ECEN 301Discussion #25 – Final Review23 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 480 240 120 60 31 Integer division by 2: 6/2 = 3

24. ECEN 301Discussion #25 – Final Review24 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 480 240 120 60 31 11 Integer division by 2: 3/2 = 1.5 → 1

25. ECEN 301Discussion #25 – Final Review25 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 480 240 120 60 31 11 00 Integer division by 2: 1/2 = 0.5 → 0

26. ECEN 301Discussion #25 – Final Review26 Binary Numbers – Decimal to Binary Example3: convert -195 to 2’s complement binary notation 1.First find positive version (195) in binary – then take 2’s complement Is it odd? 1951 971 480 240 120 60 31 11 00 011000011 2 2’s complement 100111101 2

27. ECEN 301Discussion #21 – Boolean Algebra27 Hexadecimal Notation uBinary is hard to read and write by hand uHexadecimal is a common alternative  16 digits are 0123456789ABCDEF 0100 0111 1000 1111 = 0x478F 1101 1110 1010 1101 = 0xDEAD 1011 1110 1110 1111 = 0xBEEF 1010 0101 1010 0101 = 0xA5A5 Binary Hex Dec 0000 0 0 0001 1 1 0010 2 2 0011 3 3 0100 4 4 0101 5 5 0110 6 6 0111 7 7 1000 8 8 1001 9 9 1010 A 10 1011 B11 1100 C12 1101 D13 1110 E14 1111 F15 0x is a common prefix for writing numbers which means hexadecimal 1.Separate binary code into groups of 4 bits (starting from the right) 2.Translate each group into a single hex digit

28. ECEN 301Discussion #25 – Final Review28 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation

29. ECEN 301Discussion #25 – Final Review29 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation 011101010001111010011010111 7

30. ECEN 301Discussion #25 – Final Review30 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation 011101010001111010011010111 7D

31. ECEN 301Discussion #25 – Final Review31 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation 011101010001111010011010111 74 D

32. ECEN 301Discussion #25 – Final Review32 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation 011101010001111010011010111 74 D F

33. ECEN 301Discussion #25 – Final Review33 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation 011101010001111010011010111 74 D F8

34. ECEN 301Discussion #25 – Final Review34 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation 011101010001111010011010111 74 D F8A

35. ECEN 301Discussion #25 – Final Review35 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation 011101010001111010011010111 74 D F8A3 NB: add a leading zero to complete 4 bits

36. ECEN 301Discussion #25 – Final Review36 Binary Numbers – Hexadecimal Example4: convert 011101010001111010011010111 2 to hexadecimal notation 011101010001111010011010111 0x3A8F4D7

37. ECEN 301Discussion #25 – Final Review37 Binary Numbers Example5: Complete the following table UnsignedSign-magitude1’s complement2’s complementHEX 01100110 11101011 93 -93

38. ECEN 301Discussion #25 – Final Review38 Binary Numbers Example5: Complete the following table UnsignedSign-magitude1’s complement2’s complementHEX 01100110102 0x66 11101011235-107-20-210xEB 9301011101 0x5D -93NA1101110110100010101000110xA3

39. ECEN 301Discussion #25 – Final Review39 Logic Functions 3 different ways to represent logic functions: 1.Equation: a mathematical representation of a logic function Final logic output Each letter variable represents a top-level input to the logic function Mathematical operations (i.e. addition and multiplication) are boolean algebra operations A bar over a variable represent an inverting or a NOT operation

40. ECEN 301Discussion #25 – Final Review40 Logic Functions 3 different ways to represent logic functions: 2.Gates: a visual block representation of the function Four 3-input AND gates feeding into one 4-input OR gate Top-level inputs Final output

41. ECEN 301Discussion #25 – Final Review41 Logic Functions 3 different ways to represent logic functions: 3.Truth Table: indicates what the output will be for every possible input combination ABCZ 0000 0010 0100 0111 1000 1011 1101 1111 If there are n inputs (left-hand columns) there will be 2 n entries (rows) in the table EX: 3 inputs require 2 3 = 8 rows There will always be at least one output (right-hand columns) For each input combination (row) output(s) will be either 0 or 1

42. ECEN 301Discussion #25 – Final Review42 Logic Functions – Gates TypeSymbolEquationTruth Table NOT AND OR INOUT 01 10 AB 000 010 100 111 AB 000 011 101 111

43. ECEN 301Discussion #25 – Final Review43 Logic Functions – Gates TypeSymbolEquationTruth Table NAND NOR ABOUT 001 011 101 110 AB 001 010 100 110

44. ECEN 301Discussion #25 – Final Review44 Logic Functions – Translation Logic Equations Logic Gates Truth Tables These are three different ways of representing logical information You can convert any one of them to any other ABOUT 000 011 101 111

45. ECEN 301Discussion #25 – Final Review45 Equations to Gates s a b y y y OR

46. ECEN 301Discussion #25 – Final Review46 Logic Functions – Gates to Equations out OR

47. ECEN 301Discussion #25 – Final Review47 Logic Functions – Truth Tables to Gates uEach row of truth table is an AND gate uEach output column is an OR gate SABOUT 0000 0010 0101 0111 1000 1011 1100 1111 out s a b s a b s a b s a b

48. ECEN 301Discussion #25 – Final Review48 Logic Functions – Truth Table to Equations uWrite out truth table a combination of AND’s and OR’s Ùequivalent to gates Ùeasily converted to gates SABOUT 0000 0010 0101 0111 1000 1011 1100 1111

49. ECEN 301Discussion #25 – Final Review49 Logic Functions – Equations to Truth Tables uFor each AND term Ùfill in the proper row on the truth table SABOUT 0000 0010 0101 0111 1000 1011 1100 1111

50. ECEN 301Discussion #25 – Final Review50 Boolean Algebra – Rules

51. ECEN 301Discussion #25 – Final Review51 Boolean Algebra – DeMorgan’s Law To distribute the bar, change the operation. NOR Symbols NAND Symbols

52. ECEN 301Discussion #25 – Final Review52 Boolean Algebra Example6: simplify the following function

53. ECEN 301Discussion #25 – Final Review53 Boolean Algebra Example6: simplify the following function

54. ECEN 301Discussion #25 – Final Review54 Boolean Algebra Example7: Simplify the equation created by the following truth table ABCZ 0000 0011 0100 0111 1001 1011 1101 1111

55. ECEN 301Discussion #25 – Final Review55 Boolean Algebra Example7: Simplify the equation created by the following truth table ABCZ 0000 0011 0100 0111 1001 1011 1101 1111

56. ECEN 301Discussion #25 – Final Review56 Boolean Algebra Example7: Simplify the equation created by the following truth table ABCZ 0000 0011 0100 0111 1001 1011 1101 1111

57. ECEN 301Discussion #25 – Final Review57 Boolean Algebra Example8: Determine the truth table ABCZ 000? 001? 010? 011? 100? 101? 110? 111? A B C Z

58. ECEN 301Discussion #25 – Final Review58 Boolean Algebra Example8: Determine the truth table ABCx1x1 Z 0000? 0010? 0101? 0111? 1001? 1011? 1101? 1111? A B C Z

59. ECEN 301Discussion #25 – Final Review59 Boolean Algebra Example8: Determine the truth table ABCx1x1 x2x2 Z 00001? 00101? 01011? 01110? 10011? 10111? 11011? 11110? A B C Z

60. ECEN 301Discussion #25 – Final Review60 Boolean Algebra Example8: Determine the truth table ABCx1x1 x2x2 x3x3 Z 000010? 001011? 010110? 011101? 100111? 101111? 110111? 111101? A B C Z

61. ECEN 301Discussion #25 – Final Review61 Boolean Algebra Example8: Determine the truth table ABCx1x1 x2x2 x3x3 Z 0000100 0010110 0101100 0111010 1001111 1011111 1101111 1111010 A B C Z

62. ECEN 301Discussion #25 – Final Review62 Boolean Algebra Example8: Determine the truth table ABCx1x1 x2x2 x3x3 Z 0000100 0010110 0101100 0111010 1001111 1011111 1101111 1111010

63. ECEN 301Discussion #25 – Final Review63 Combinational Logic – Decoders uDecode the input and signify its value by raising just one of its outputs. uA decoder with n inputs has 2 n outputs X Y Z W 2-to-4 Decoder AB W X Y Z DECODER Symbol

64. ECEN 301Discussion #25 – Final Review64 Combinational Logic – Decoders uWrite the truth table X Y Z W ABWXYZ 001000 010100 100010 110001

65. ECEN 301Discussion #25 – Final Review65 Combinational Logic – Multiplexors uConnect one of its inputs to its output according to select signals uUseful for selecting one from a collection of data inputs. uUsually has 2 n inputs and n select lines. AB S C 10 MULTIPLEXOR Symbol

66. ECEN 301Discussion #25 – Final Review66 Combinational Logic – Multiplexors uWrite the truth table AB S C 10 MULTIPLEXOR Symbol ABSC 0000 0010 0101 0110 1000 1011 1101 1111

67. ECEN 301Discussion #25 – Final Review67 Sequential Logic – SR Latch SR Latch with additional inputs: ÙEnable (E) – S and R can only change Q when E is 1 ÙPreset (PRE) – regardless of S, R, or E, put Q to 1 when PRE is 1 ÙClear (CLR) – regardless of S, R, E, or PRE, put Q to 0 when CLR is 1 SQ R E PRE CLR E S R PRE CLR Q Precedence : 1.If CLR = 1, Q = 0 2.If PRE = 1, Q = 1 3.If E = 1, Q is set based on SR: If S = 0 and R = 0, Q = held If S = 0 and R = 1, Q = 0 If S = 1 and R = 0, Q = 1 If S = 1 and R = 1, Q = unstable 4.Else Q is held SR can only change Q only in blue regions (where E = 1) BUT CLR and PRE will change Q ANYTIME

68. ECEN 301Discussion #25 – Final Review68 Sequential Logic – D Latch D Latch has only 2 states: ÙSet (set Q to 1): D = 1 ÙReset (reset Q to 0): D = 0 D Latch with enable (E): ÙQ can only change when E = 1 EDQ new 00Q old 01 100 111 DQ E SQ R E D E E D Q D can only change Q only in blue regions (where E = 1)

69. ECEN 301Discussion #25 – Final Review69 Sequential Logic – D Flip-Flop D FF: 2 SR latches in master/slave configuration. The output (Q) changes on the rising clock edge DCLKQ new 00 11 DQ CLK SQ R SQ RQ E E D Q MasterSlave CLK D Q D can only change Q only on rising clock edge (arrows)

70. ECEN 301Discussion #25 – Final Review70 Sequential Logic – JK Flip-Flop JK FF: 2 SR latches in master/slave configuration. The output (Q) changes on the falling clock edge JKCLKQ new 00Q old 010 101 11 JK FF has 4 allowed states: ÙPresent state (keep Q as is): J = 0, K = 0 ÙReset (reset Q to 0): J = 0, K = 1 ÙSet (set Q to 1): J = 1, K = 0 ÙToggle (set Q to Q): J = 1, K = 1 SQ R SQ RQ E E CLK J Q QK J Q K Indicates falling clock edge

71. ECEN 301Discussion #25 – Final Review71 Sequential Logic – T Flip-Flop T FF: JK FF with J and K inputs connected TCLKQ new 0Q old 1 T FF has 2 allowed states: ÙPresent state (keep Q as is): T = 0 ÙToggle (set Q to Q): T = 1 CLK T Q J Q K TQ

72. ECEN 301Discussion #25 – Final Review72 Sequential Logic – Digital Counters Ripple counter: with N bits, cycles through the numbers from 0 to 2 N – 1 ÙN JK FFs cascaded together to produce an N-bit up counter CLK J Q K J Q K J Q K 111 B2B2 B1B1 B0B0 NB: for 3-bit counter we need 3 FFs CLK B0B0 B1B1 B2B2

73. ECEN 301Discussion #25 – Final Review73 Sequential Logic – Digital Counters Synchronous counter: with N bits, cycles through the numbers from 0 to 2 N – 1 ÙInput clock drives all FFs simultaneously TQ CLK TQ TQ 1 B0B0 B1B1 B2B2 B0B0 B1B1 B2B2

74. ECEN 301Discussion #25 – Final Review74 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK TQ J Q K DQ Q2Q2 Q1Q1 Q0Q0

75. ECEN 301Discussion #25 – Final Review75 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK T Q new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 000 0 0 0 0 1 1 1 0 1.Set outputs to 000 2.Based on output values change FF inputs 3.On each clock cycle: a)change FF outputs based on inputs b)Change FF inputs based on new outputs TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0

76. ECEN 301Discussion #25 – Final Review76 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK T Q new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 000 1.Set outputs to 000 2.Based on output values change FF inputs 3.On each clock cycle: a)change ALL FF outputs based on inputs TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0

77. ECEN 301Discussion #25 – Final Review77 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK T Q new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 000 0 0 0 0 1 1 1 0 1.Set outputs to 000 2.Based on output values change FF inputs 3.On each clock cycle: a)change ALL FF outputs based on inputs b)Change ALL FF inputs based on new outputs TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0

78. ECEN 301Discussion #25 – Final Review78 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK CycleQ2Q2 Q1Q1 Q0Q0 start000 TCLKQ new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 000 0 0 0 0 1 1 1 0 Inputs changed due to outputs TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0

79. ECEN 301Discussion #25 – Final Review79 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK CycleQ2Q2 Q1Q1 Q0Q0 start000 1011 TCLKQ new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 111 0 0 0 0 1 1 1 0 Outputs change on new clock cycle TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0

80. ECEN 301Discussion #25 – Final Review80 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK CycleQ2Q2 Q1Q1 Q0Q0 start000 1111 TCLKQ new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 111 1 1 1 1 0 0 0 1 Inputs changed due to outputs TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0

81. ECEN 301Discussion #25 – Final Review81 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK CycleQ2Q2 Q1Q1 Q0Q0 start000 1011 2010 TCLKQ new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 010 1 1 1 1 0 0 0 1 Outputs change on new clock cycle TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0

82. ECEN 301Discussion #25 – Final Review82 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK CycleQ2Q2 Q1Q1 Q0Q0 start000 1011 2010 TCLKQ new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 010 0 0 1 0 1 0 1 0 TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0 Inputs changed due to outputs

83. ECEN 301Discussion #25 – Final Review83 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK CycleQ2Q2 Q1Q1 Q0Q0 start000 1011 2010 3100 TCLKQ new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 100 0 0 1 0 1 0 1 0 TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0 Outputs change on new clock cycle

84. ECEN 301Discussion #25 – Final Review84 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK CycleQ2Q2 Q1Q1 Q0Q0 start000 1011 2010 3100 TCLKQ new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 100 1 0 0 1 1 0 0 0 TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0 Inputs changed due to outputs

85. ECEN 301Discussion #25 – Final Review85 Sequential Logic Example9: Assuming the outputs of the following circuit start in a 000 state, determine the outputs for 4 clock cycles CLK CycleQ2Q2 Q1Q1 Q0Q0 start000 1011 2010 3100 4110 TCLKQ new 0Q old 1 DCLKQ new 00 11 JKCLKQ new 00Q old 010 101 11 110 1 0 0 1 1 0 0 0 TQ CLK J Q K DQ Q2Q2 Q1Q1 Q0Q0 Outputs change on new clock cycle

86. ECEN 301Discussion #25 – Final Review86 Digital to Analog Converter (DAC) DAC: converts an unsigned binary word to an analog output voltage or current Resolution δv: minimum step size by which the output voltage (or current) can increment Output voltage v a : the analog value represented by the binary word B EX: let n=4 v a = (2 3 ·b 3 + 2 2 ·b 2 + 2 1 ·b 1 + 2 0 ·b 0 )δv Max output voltage v aMax : the maximum analog value EX: let n=4 v aMax = (2 3 + 2 2 + 2 1 + 2 0 )δv = (2 n – 1) δv

87. ECEN 301Discussion #24 – DAC87 Digital to Analog Converter (DAC) Building a DAC: use a summing amplifier – + +vo–+vo– +–+– +–+– +–+– R Sn R S2 R S1 v Sn v S2 v S1 RFRF – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0 Summing amplifierDAC

88. ECEN 301Discussion #25 – Final Review88 Digital to Analog Converter (DAC) Building a DAC: the analog output (v a ) is proportional to the binary word B – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0 Choose THUS v si in summing amplifier

89. ECEN 301Discussion #25 – Final Review89 Digital to Analog Converter (DAC) Example10: find the smallest resolution δv of an 8-bit DAC v aMax = 12V – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0

90. ECEN 301Discussion #25 – Final Review90 Digital to Analog Converter (DAC) Example10: find the smallest resolution δv of an 8-bit DAC v aMax = 12V – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0

91. ECEN 301Discussion #25 – Final Review91 Digital to Analog Converter (DAC) Example11: find the resistor values for a DAC with: range = 15V δv = 1V v in = 5V R F = 2kΩ – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0

92. ECEN 301Discussion #25 – Final Review92 Digital to Analog Converter (DAC) Example11: find the resistor values for a DAC with: range = 15V δv = 1V v in = 5V R F = 2kΩ – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0

93. ECEN 301Discussion #25 – Final Review93 Digital to Analog Converter (DAC) Example11: find the resistor values for a DAC with: range = 15V δv = 1V v in = 5V R F = 2kΩ – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0

94. ECEN 301Discussion #25 – Final Review94 Digital to Analog Converter (DAC) Example11: find the resistor values for a DAC with: range = 15V δv = 1V v in = 5V R F = 2kΩ – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0