1. Montek Singh COMP790-084 Oct 6, 2011

2.  Today’s topics: ◦ approximate arithmetic ◦ simple applications  Next time: ◦ more applications ◦ architectures and design tools ◦ challenges and benefits ◦ open questions

3.  Supply reduced voltage to adder gates ◦ fine-grain: each stage receives own voltage ◦ coarse-grain: use binning

4.  Error induced:  Energy consumed:

5.  Voltage selection ◦ fine-grain: each stage receives own voltage ◦ coarse-grain: use binning

6.  Geometric model for voltage assignment ◦ higher order bit receives progressively higher voltage

7.  Energy-correctness tradeoff

8.  Energy-correctness tradeoff example

9.  Lower voltage causes clock deadline to be missed ◦ some of the longer carry chains cannot complete!

11.  Example: DFT