1. Put your group member’s name here, click on View -> Master -> Slide Master. ECE 408/CS483, University of Illinois, Urbana-Champaign Title Member Names

2. Put your group member’s name here, click on View -> Master -> Slide Master. ECE 408/CS483, University of Illinois, Urbana-Champaign DESIGN OVERVIEW Give an overview of your design; include the final flow charts of your algorithms, and discuss how parallelism is exploited in them.

3. Put your group member’s name here, click on View -> Master -> Slide Master. ECE 408/CS483, University of Illinois, Urbana-Champaign IMPLEMENTATION Describe in more detail the kernels and functions you created. Trace the data flow through each kernel, describing any data marshaling where applicable.

4. Put your group member’s name here, click on View -> Master -> Slide Master. ECE 408/CS483, University of Illinois, Urbana-Champaign VERIFICATION What is your testing procedure to make sure your implementation is robust and correct? For cases where the accuracy may be compromised in order to use the single-precision hardware and/or to achieve higher level of parallelism, provide an acceptance test for your output.

5. Put your group member’s name here, click on View -> Master -> Slide Master. ECE 408/CS483, University of Illinois, Urbana-Champaign PERFORMANCE Did you achieve your performance goals? What went well with CUDA in terms of the performance gained? What hindered performance? Given enough development time, what is the best performance you think you could ultimately achieve with this application on the current generation of GPUs? What are the features in the toolset or hardware that would allow you to increase performance even more?

6. Put your group member’s name here, click on View -> Master -> Slide Master. ECE 408/CS483, University of Illinois, Urbana-Champaign CONCLUSIONS