1. 1.2.7.2 Interconnection boards Test data memories VME interface Trigger TX Trigger RX FPGA: memory and I/O control DAQ pipelines and buffers DAQ interface sync Clock + control

2. 1.2.7.3 Module collector board  1 of 3 identical channels (share single FPGA?) FPGA Time filter, analog sums, logical OR OR S2 S1 to custom backplane VME interface Outputs : serial, each 12 bits @ 25MHz OR: 6 bits earliest time, 6 bits second earliest time of the OR’s of groups of channels in time and above OT ST: 6 bits earliest time, 6 bits second earliest time for sums of channels in time (each above SIT) that are above SOT S 1 : 6 bits time, 6 bits amplitude for the earliest sum of input channels in time and above SIT S 2 : 6 bits time, 6 bits amplitude for the second earliest sum of input channels in time and above SIT ST IN 1 IN 2 IN 3 IN 4 IN 5 IN 6 Inputs: serial, each 12 bits @ 25MHz 6 bits time, 6 bits amplitude

3. 1.2.7.4 Strip routing card FPGA: Process backplane inputs sums; reroute to zero suppressed outputs grouped by strips 9 9 9 9 9 9 Strips 1-3 mod 1-3 Module sums Module 1 Module 2 Module 3 Module 4 Module 5 Module 6 Backplane Strips 4-6 mod 1-3 3 Strips 6-9 mod 1-3 3 3 6 Strips 1-3 mod 1-3 Strips 4-6 mod 1-3 Strips 6-9 mod 1-3 3 3 3

4. 1.2.7.5 Strip collector FPGA: demultiplex + resync inputs make strip sums a.superstrips: 2 by 2 opposing b.projections: in depth Strips mod. 1-3 Q1 mod. 4-6 Q1 mod. 7-9 Q1 mod. 1-3 Q2 mod. 4-6 Q2 mod. 7-9 Q2 Projections 3 3 3 3 3 3 3 Logical outputs (2 bits/mod,) 2 2 2 To backplane Superstrip 1 Superstrip 2 Superstrip 3 Can share hardware design with module collector ?

5. Module collectors for PR-CAL + UPV  Prerad One view-module has 9 scintillators read on both sides If 18 channels/board: 8 boards per quadrant view  Calorimeter Region matching one PR strip : 2×18 Shashlik modules  x “strip” made with 6 (2×3) groups, y “strip” with 6 (1×6)  One module collector handles 3 “strips” 3 module collectors per quadrant view  Total number required: 24  One PR crate can handle all modules of one view Need 8 crates for PR front end ( 9 u ? )  x-y sums 9 modules × 4 quadrants = 36 channels Module collectors: 12  Upstream photon veto (assume all used in trigger) Has 22 ×6 logs read on both ends. One digitizer serves 9 channels. Total 15 WFD Module collectors: 1 z y x y

6. Module collectors for barrel veto  Barrel veto 2042 shashlik modules One digitizer/group of 18 channels Grouping for trigger:  A(3,4,5,10,11,12),A(2,6,9,13),A(1,7,8,14)  B(3,4,5,10,11,12),B(2,6,9,13),B(1,7,8,14)  C(3,4,5,10,11,12),C(2,6,9,13),C(1,7,8,14)  D(full azimuth) Module collectors: 4 z  AB C D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 AB C D A 1 2 3 4 5 6 7 8 9 10 11 12 13 14

7. Module collectors: Barrel CPV  Barrel CPV Each layer in z has 162 PM’s  Simple solution Use only 16 channel per WFD 2 WFD/layer  20 WFD Can map 3 layers in z to one module collector channel  Module collectors: 2  Patchwork solution (see picture) Use 18 channels/WFD   18 WFD (3 module collector channels)  Module collector: 1  Other systems Upstream end cap CPV, downstream end cap CPV, downstream beam pipe, magnet 2 module collectors

8. Final count of module collector boards Simple CPV (3) CAL strips24 PR-CAL modules 12 BV4 UPV1 CPV2 Other channels 2 Total45

9. Strip routing cards - Strip collector  Strip routing card (16 boards) 2 crates per PR-CAL quadrant/view  Each crate has two strip router modules with outputs grouped by strip  16 boards  Strip collector (18 boards) Each board handles 3 strips Backplane output to pattern recognition board  There are 18 strips/view  12 boards  Share hardware with module collector  Connect with pattern recognition board with the same backplane used for the strip routing board

10. Module collectors 1.2.7.4, 5, 6 Route/collect modules module coll. strip routing strip coll. 1.2.7.8, 9, 10 Logic modules projection pattern boolean logic TL BL TR BR PR-CAL- veto logic Trigger Align, form, transmit, scalers Central logic BV, UPV xy

11. Change summaries Better define interconnection boards (1.2.7.2) Recount module collectors (1.2.7.3) for small r and 3 channels/board: 45 Cost module collector production @3k$ each (?) Remove second prototype for module collector Strip collector shares hardware with module collector Strip collector and pattern boards sit in the same 9U crate and are connected by custom backplane (same design as for strip routing) Pattern board and projection board collapse to a single 9U board receiving output from backplane (increase design time)