1. Declarative Programming Languages for Multicore Architecures Workshop 15 January 2006

2. Declarative Programming Languages for Multicore Architectures Welcome… …to the first workshop on Declarative Programming Languages for Multicore Architectures! Multicores are coming We need to program them Correctly! Implicit parallelism is promising But can it be made effective

3. Declarative Programming Languages for Multicore Architectures Logistics Workshop, breakfast, and breaks here in Cypress Lunch in suite J2 – buffet style Informal style –Ask questions –Discuss –Mixture of retrospective, work in progress, and speculation on the future Name tags at the back if you dont have one No wireless

4. Declarative Programming Languages for Multicore Architectures Programme 8:40Keynote: The Evolution of Computing Architectures 1:00Panel 9:40Break2:00Break 9:55pH: Lessons Learned2:20Now you C it. Now you Dont. 10:20Nesl2:45Hume and Multicore Architectures 10:45Break3:10Automatic Parallelization and Granularity Control of Logic and Constraint Programs 11:00The Next Generation of Logic Languages 3:35Break 11:25A Look Back and Forward at Parallel Logic Programming 3:55Design and Implementation Issues for Atomicity 11:50Lunch4:20Stabilizers 4:45Nested Data Parallelism in Haskell 5:10Wrap Up

5. Declarative Programming Languages for Multicore Architectures Panel: Lessons from the Past and What it Means for Multicores Questions to ponder: What worked and what did not work in the research of the 80s and 90s? What are the remaining hard problems from previous research? Which hard problems are relevant to multicores, and which are mitigated? What does the experience of 80s and 90s suggest for multicore design/architecture?

6. Declarative Programming Languages for Multicore Architectures Thanks To all of you for attending To all the presenters To Anwar Ghuloum, Leaf Petersen, and Jesse Fang for helping me to organise the workshop To Intels PSL for sponsoring the workshop To Margarida Strickland for administrative support

7. Declarative Programming Languages for Multicore Architectures Keynote The Evolution of Computing Architectures Douglas Carmean Senior Principal Architect Intel Corporation

8. Declarative Programming Languages for Multicore Architectures Panel: Lessons from the Past and What it Means for Multicores What worked and what did not work in the research of the 80s and 90s? What are the remaining hard problems from previous research? Which hard problems are relevant to multicores, and which are mitigated? What does the experience of 80s and 90s suggest for multicore design/architecture?

9. Declarative Programming Languages for Multicore Architectures Summary Hardware Implicit parallelism Language design Key problems Cross fertilisation Hardware ideas Intel Next steps

10. Declarative Programming Languages for Multicore Architectures Hardware Summary Three types of parallelism: Vector units – floating point, but integer too SMT – multiple register sets in single core SMP – multiple cores on chip

11. Declarative Programming Languages for Multicore Architectures Implicit Parallelism Summary Over promised, under delivered Easy to generate lots of parallelism Problem is to schedule Cactus stacks, thunks worked well Sequential (deterministic) semantics is important Easier to debug Cost models are important Communication was a problem Not with multicores

12. Declarative Programming Languages for Multicore Architectures Language Design Thoughts Dont commit to specific hardware Dont base the language on the implementation Exact reduction operations are important (see Nesl) Domain specific languages Bad idea, use libraries instead Atomic great for when you have effects

13. Declarative Programming Languages for Multicore Architectures More Language Design Thoughts Control of effects is very beneficial Fewer writes TM logs Three layers of language: Explicit – transactional memory, atomicity Implicit – declarative and sequential Data parallelism – especially vector

14. Declarative Programming Languages for Multicore Architectures Controversy Are annotations needed? No Minimal (and vs or parallelism) Strategies Manuels ideas Message Passing – good or bad? MPI bad Perhaps a good programming abstraction exists for certain applications Cost models

15. Declarative Programming Languages for Multicore Architectures Key Problems Memory management Concurrent GC is an important problem Data locality How to place data Shared vs non-shared memory Memory Models Cost Models Debugging Put the models together Thread packages and good low-level libraries

16. Declarative Programming Languages for Multicore Architectures Cross Fertilisation Or-parallelism for search What is the equivalent in FP? Nesl good at Vector, SMT, and SMP Can LP do this too? What are the similarities between the communities and can they exchange results?

17. Declarative Programming Languages for Multicore Architectures Hardware Ideas - General General purpose mechanisms, language specific bad Memory bandwidth is fundamental issue Latency solved? Dataflow? Programmable hardware?

18. Declarative Programming Languages for Multicore Architectures Hardware Ideas - Specific Hardware support for Transactional Memory Read and/or write barriers for GC, TM, I-structs Fast context switching, lightweight spawn & sched No glass-jaws in synchronisation instructions Non-shared memory NUMA caches Allocate in cache

19. Declarative Programming Languages for Multicore Architectures Intel Feel free to talk to us: Anwar, David, Leaf, Neal, and Rob PSL is working on: McRT – threading, scheduling, and synchronisation Pillar – target language (a la C--) for parallel languages Intel Research: Jekyll, Autolocker, Lockbend, …

20. Declarative Programming Languages for Multicore Architectures This Workshop Follow On Feel free to give me feedback at: neal.glew@intel.com A website will be constructed if presenters are willing to give me their slides Ill send a message when ready

21. Declarative Programming Languages for Multicore Architectures The Future A once off? Repeat again next year and then see? –Open? –Associated with what? Or by itself? Something else? Follow on for the hardware ideas?