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April 30, 2014 1 20nm/14nm process technologies for FPGAs Benefits and Challenges Avner Uzan - Eastronics.

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Presentation on theme: "April 30, 2014 1 20nm/14nm process technologies for FPGAs Benefits and Challenges Avner Uzan - Eastronics."— Presentation transcript:

1 April 30, 2014 1 20nm/14nm process technologies for FPGAs Benefits and Challenges Avner Uzan - Eastronics

2 April 30, 2014 2 Agenda Semiconductor Industry Moving to FinFET Heterogeneous Computing - a Major Industry Trend ALTERA’s “Generation 10” FPGAs

3 April 30, 2014 3 Semiconductor Industry Moving to FinFET

4 April 30, 2014 4 The Invention of the Transistor – Electronics Era Begins In 1947, Bardeen, Brattain, and Shockley invented the first (bipolar) transistor – awarded the 1956 Nobel Prize in Physics

5 April 30, 2014 5 ~10 Years later – The Modern MOSFET is Born D. Kahng M. Atalla For the next 50+ years the 2D structure of the MOSFET transistor remains unchanged

6 April 30, 2014 6 1991: The First 3D “FinFET” transistor DELTA = DEpleted Lean-channel TrAnsistor D. Hisamoto

7 April 30, 2014 7 1999: The Term for the 3D Transistor “FinFET” is Coined

8 April 30, 2014 8 The End of the 2D Planar Transistor: May 4, 2011 8 Source: http://newsroom.intel.com/community/intel_newsroom/blog/2011/05/04/intel-reinvents-transistors-using-new-3-d-structurehttp://newsroom.intel.com/community/intel_newsroom/blog/2011/05/04/intel-reinvents-transistors-using-new-3-d-structure

9 April 30, 2014 9 3D Transistor (Tri-Gate and FinFET) R&D Activity Sources: IEEE Xplore, www.freepatentsonline.com Tri-Gate and FinFET Research Increasing FinFET has Driven R&D Spend at Many Foundries Now considered Future of CMOS Transistor Technology

10 April 30, 2014 10 3D Transistor (Tri-Gate and FinFET) Structure SOURCE: Mark Bohr, Intel Developer’s Forum 6 Sept 2011

11 April 30, 2014 11 Allows smaller junction sizes 3D Transistor (Tri-Gate and FinFET) Advantage Summary Intel’s 14 nm Tri-Gate Technology Higher Effective Channel Width Lower Leakage Current And 2 nd Generation Technology > 2X Core Performance Improved SEU Resistance > 50% Power Reduction Higher Densities Technology Leadership

12 April 30, 2014 12 Heterogeneous Computing, a major market trend

13 April 30, 2014 13 Heterogonous Computing Heterogeneous computing refers to systems that use more than one kind of processor These are multi-core systems that gain performance not just by adding cores, but also by incorporating specialized processing capabilities to handle particular tasks

14 April 30, 2014 14 Heterogonous Computing

15 April 30, 2014 15 Heterogeneous Computing Is A Major Industry Trend

16 April 30, 2014 16 Heterogeneous Computing Is A Major Industry Trend 16 “Heterogeneous computing will drive big changes in the markets for all discrete processing technologies.” October 2013

17 April 30, 2014 17 ALTERA’s “Generation 10” FPGAs FPGAs and SoCs

18 April 30, 2014 18 Extending Altera’s Tailored Approach With 14 nm 18 Today’s Portfolio Single Node - 28 nm Generation 10 Portfolio Multiple Nodes - 14 nm, 20 nm, 55 nm 55 nm 20 nm 14 nm Tri-Gate 28LP 28HP MAX ® 10

19 April 30, 2014 19 Reinventing the Midrange TSMC 20 nm planar process 15% faster than current high end family 40% power savings versus current midrange 50% processor system improvement Delivering Unimaginable Performance Intel 14 nm Tri-Gate process 2x increase in performance 70% power savings 3rd-generation processor system Breakthrough Advantages

20 April 30, 2014 20 Heterogeneous Computing with SoC Technology + A LTERA ® SDK FOR O PEN CL A LTERA ® SDK FOR O PEN CL CPU Subsystem

21 April 30, 2014 21 Altera SoC Product Portfolio 28nm TSMC 925 MHz Dual ARM Cortex TM - A9 MPCore TM 5G Transceivers 400 MHz DDR3 25 to 110 KLE Up to 224 Multipliers (18x19) 28nm TSMC 1.05 GHz Dual ARM Cortex TM - A9 MPCore TM 10G Transceivers 533 MHz DDR3 Up to 462 KLE Up to 2136 Multipliers (18x19) 20nm TSMC 1.5 GHz Dual ARM Cortex TM - A9 MPCore TM 17G Transceivers 1333 MHz DDR4 Up to 660 KLE Up to 3356 Multipliers (18x19) 14nm Intel Tri-Gate 64-bit Quad ARM A53 MP Core TM Optimized for Max Performance per Watt Over 4000 KLE LOW END SoCs (Lowest Power, Form Factor & Cost) HIGH END SoCs (Highest Performance & System Bandwidth) MID RANGE SoCs (High Performance with Low Power, Form Factor & Cost) LOW POWER HIGH PERFORMANCE DEVICE AVAILABILITY Availability of SoC devices across product portfolio …

22 April 30, 2014 22 ARM Cortex™-A53 on Intel 14 nm Tri-Gate Process High Performance + Power Efficiency >6x throughput improvement Highest power efficiency of any 64-bit processor Wide portfolio reusability Software compatibility with previous generation (32-bit mode) Cortex-A53 target markets overlap with Stratix 10 SoCs (communications infrastructure, enterprise, datacenter)

23 April 30, 2014 23 Altera’s Heterogeneous Computing Tools Foundation Industry’s Only FPGA-Adaptive Debug Industry’s Only FPGA OpenCL Solution ™ Altera ® SDK for OpenCL The Open Standard for Parallel Programming of Heterogeneous Systems Generates hardware from OpenCL software; unlocks resources for software designers Mature solution, intensive testing, achieved conformance with OpenCL Khronos standard Industry Standard Tools for Debug and Application Development of ARM Processors Enables whole chip heterogeneous debug and visualization ARM-Altera strategic partnership for ARM DS-5 ® Altera Edition tool “Because FPGAs enable parallel processing, they are critical for specialized server workloads that demand real-time performance. We are pleased that our clients are now able to take full advantage of this technology on power systems using Altera's SDK for OpenCL." --Robert L. Swann, vice president, IBM Power Systems

24 April 30, 2014 24 Thank you


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