Presentation is loading. Please wait.

Presentation is loading. Please wait.

Dynamic Programming and Some VLSI CAD Applications

Similar presentations


Presentation on theme: "Dynamic Programming and Some VLSI CAD Applications"— Presentation transcript:

1 Dynamic Programming and Some VLSI CAD Applications
Shmuel Wimer Bar Ilan Univ. Eng. Faculty Technion, EE Faculty May 2012 Dynamic Programming

2 Outline NP Completeness paradox
Efficient matrix multiplication by dynamic programming Dynamic programming in a tree model Optimal tree covering in technology mapping Optimal floor planning Optimal buffer insertion Dynamic programming as sequential decision problem Resource allocation The knapsack problem Automatic cell layout generation Optimal wire sizing May 2012 Dynamic Programming

3 NP Completeness Paradox
May 2012 Dynamic Programming

4 j i 1 2 3 4 5 6 7 8 9 10 11 12 13 T F May 2012 Dynamic Programming

5 May 2012 Dynamic Programming

6 May 2012 Dynamic Programming

7 Optimal Matrix-Chain Multiplication
May 2012 Dynamic Programming

8 May 2012 Dynamic Programming

9 May 2012 Dynamic Programming

10 May 2012 Dynamic Programming

11 May 2012 Dynamic Programming

12 May 2012 Dynamic Programming

13 May 2012 Dynamic Programming

14 i=1 2 3 4 5 6 i=1 2 3 4 5 6 15125 10500 5375 3500 5000 11875 7125 2500 1000 9375 4375 750 7875 2625 15750 3 5 4 1 2 J=6 5 4 3 2 1 J=6 5 4 3 2 1 m[1..6,1..6] s[1..6,1..6] May 2012 Dynamic Programming

15 May 2012 Dynamic Programming

16 May 2012 Dynamic Programming

17 Elements of Dynamic Programming
A problem exhibits optimal substructure if an optimal solution to the problem contains within it optimal solutions to sub problems. In a sequence of decisions the remaining ones must constitute optimal solutions regardless of past decisions. (principle of optimality). The space of sub problems must be small, namely, a recursive solution must solve same problem many times. Optimization problem has overlapping sub-problems. May 2012 Dynamic Programming

18 Optimal solution is constructed by backtracking.
Overlapping sub-problems called by recursive solution are memorized (encoded in a table), hence addressing their solution only once. Optimal solution is constructed by backtracking. May 2012 Dynamic Programming

19 Optimal Tree Covering A problem occurring in mapping logic circuit into new cell library. Given: Rooted binary tree T(V,E) called subject tree (cone of logic circuit), whose leaves are inputs, root is an output and internal nodes are logic gates with their I/O pins. A family of rooted pattern trees (logic cells of library), each associated with a non-negative cost (area, power, delay). Root is cell’s output and leaves are its inputs. May 2012 Dynamic Programming

20 Find a cover of subject tree whose total sum of costs is minimal.
A cover of the subject tree is a partitioning where every part is matching an element of library and every edge of the subject tree is covered exactly once. Find a cover of subject tree whose total sum of costs is minimal. May 2012 Dynamic Programming

21 r s t u t1 (2) t2 (3) t5 (5) t4 (4) t3 (3) t4 t1 t3 4+2+3=9 t2 t1 t3 =10 t2 t5 3+5=8 May 2012 Dynamic Programming

22 AOI21 (3) NAND3 (3) NAND2 (2) INV (1) INV (1) NAND2 (2) a b c d g e f j h i NAND2 (5) NAND2 (8) INV (9) AOI21(6) NAND2 (11) NAND3 (12) INV (3) NAND2 (5) NAND3 (3) Observation: pattern p rooted at the root of T(V,E) yields minimal cost only if the cost at any of p’s leaves is minimal, suggesting bottom-up matching algorithm. May 2012 Dynamic Programming

23 May 2012 Dynamic Programming

24 Optimal Buffer Insertion
v u , q ? ? ? ? ? ? ? May 2012 Dynamic Programming

25 Delay Model May 2012 Dynamic Programming R4 4 C4 R2 2 R5 5 C3 R1 C5 1
1 3 2 4 5 6 7 May 2012 Dynamic Programming

26 Bottom-Up Solution RM CM M sub-tree (TM , LM) K (T’K , L’K) (TK , LK)
RK CK RN CN N sub-tree (TN , LN) May 2012 Dynamic Programming

27 Outline of Algorithm + =
With b nodes, 2b buffer insertions exist. There’s a polynomial solution! Merging sub-tree solutions at a parent node takes linear time! LM TM LN TN L’K T’K + = May 2012 Dynamic Programming

28 Interconnect Signal Model
driver’s resistance receiver’s load line resistance signal's activity, 0<= AF <=1 line-to-line coupling Using Elmore delay model, simple, inaccurate but with high fidelity May 2012 Dynamic Programming

29 Interconnect Bus Model
σ1 A σi σn σn-1 Wi Si Si+1 Ri Ci L May 2012 Dynamic Programming

30 Delay and Dynamic Power Minimization
signal’s delay: signal’s dynamic power: May 2012 Dynamic Programming

31 In 32nm node and beyond spaces and widths are very few discrete values
Minimize bus delay Minimize bus power Subject to: In 32nm node and beyond spaces and widths are very few discrete values Continuous optimization and its well-known results are invalid. The sizing problem is NP-complete. A pseudo polynomial resource allocation dynamic programming solution is suitable. May 2012 Dynamic Programming

32 May 2012 Dynamic Programming

33 May 2012 Dynamic Programming

34 Floorplan and Layout Floorplan Graph representation
B1 B2 B8 B7 B2 B8 B9 B7 B1 B9 B12 B10 B5 B3 B10 B3 B5 B4 B12 B6 B11 B11 B6 B4 Floorplan is represented by a planar graph. Vertices - vertical lines. Arcs - rectangular areas where blocks are embedded. A dual graph is implied. May 2012 Dynamic Programming

35 From Floorplan to Layout
Actual layout is obtained by embedding real blocks into floorplan cells. Blocks’ adjacency relations are maintained Blocks are not perfectly matched, thus white area (waste) results Layout width and height are obtained by assigning blocks’ dimensions to corresponding arcs. Width and height are derived from longest paths Different block sizes yield different layout area, even if block sizes are area invariant. May 2012 Dynamic Programming

36 Optimal Slicing Floorplan
Top block’s area is divided by vertical and horizontal cut-lines Slicing tree. Leaf blocks are associated with areas. v B1 B2 B8 B7 h v B9 B1 B2 B7 h B12 B12 B10 B11 B3 B4 B5 B6 B8 B9 B10 B3 B5 B11 B6 B4 May 2012 Dynamic Programming

37 May 2012 Dynamic Programming

38 Merge horizontally two width-height sets (vertical cut-line)
+ = + = + = May 2012 Dynamic Programming

39 h Size of new width-height list equals sum of lengths of children lists, rather than their product. May 2012 Dynamic Programming

40 Sketch of Proof Problem is solved by a bottom-up dynamic programming algorithm working on corresponding slicing tree. Each node maintains a set of width-height pairs, none of which can be ruled out until root of tree is reached. Size of sets is in the order of node’s leaf count. Sets in leaves are just Bi’s two orientations. The sets of width-height pairs at each node is created by merging the sets of left-son and right-son sub-trees in time linear in their size. Width-height pair sets are maintained as a sorted list in one dimension (hence sorted inversely in the other dimension). Final implementation is obtained by backtracking from the root. May 2012 Dynamic Programming

41 Automatic Cell Layout Generation
3 step process: Transistor placement Interconnect completion Design rule adherence Transistor placement comprises: Transistor P-N pairing Pair ordering Pair flipping – optimize cell area, node cap, potential cell abutment, cell’s internal routing b a Vcc Vss Cost=0 a b Vcc Vss Cost=1 a Vcc b Vss Cost=2 a Vcc b Vss May 2012 Dynamic Programming

42 Most cells unfortunately contain more than 4 transistors.
A flip configuration of a pair depends on the flip of its left and right neighbors. Seek the flip configuration yielding minimal sum of abutment cost. With n pairs, there are 2n solutions to consider. Observation: An optimal flip of j+1 pairs subject to given right end configuration of pair j necessitates that the first j pairs have been optimally flipped. Principle of optimality, optimal sub problem solutions. Observation: The optimal flip of rest n – j pairs is independent of the first j flips except the right end configuration of pair j. This defines a state for which only the lowest cost flip of j pairs is of interest. Dynamic Programming solution is in order. (Bar-Yehuda et. al.) May 2012 Dynamic Programming

43 State Augmentation stage j stage j+1 a b c d a b c d abutment cost
May 2012 Dynamic Programming

44 Dynamic programming takes O(n) time.
Can be extended to multi-row cell (double height, etc.). It can be combined in a DFS algorithm which considers simultaneously paring, pair ordering and optimal flip, without any complexity overhead (state augmentation takes O(1) time) Dynamic programming is solving in fact a shortest path algorithm on the state transition graph. New litho rules in 32nm and smaller feature size offer many optimization opportunities. May 2012 Dynamic Programming

45 Resource Allocation May 2012 Dynamic Programming

46 May 2012 Dynamic Programming

47 Elements of Dynamic Programming
Sequential decision making process. Transition occurs from state to state. A state is a summary of prior history of the process sufficiently detailed to enable evolution of current alternatives. Sequential decision process evolves from state to state. The pair (j,y) is a state in the resource allocation process. The elements encoded in a state are called state variables. Principle of optimality states that whatever the initial state is and decisions were, the remaining decisions must constitute an optimal policy. May 2012 Dynamic Programming

48 Linear Case: Knapsack Problem
May 2012 Dynamic Programming

49 Linear Case: Knapsack Problem
May 2012 Dynamic Programming


Download ppt "Dynamic Programming and Some VLSI CAD Applications"

Similar presentations


Ads by Google