1. Zheyu Zhang For ECE 620 – CURENT Course September 23, 2015
Gate Drive Design of Wide Bandgap Semiconductors for Voltage Source Converter Applications
Zheyu Zhang
For ECE 620 – CURENT Course
September 23, 2015

2. What is a Gate Driver
Gate driver is a link between world of control and world of power
World of control is world of 1.8V, 3.3V, 5V……
World of power is world of thousands of Volts and thousands of Ampers
A good gate driver is not NICE to have, it is a MUST

3. Outline Gate Driver for Wide Bandgap Power Semiconductors
Gate Driver Fundamentals
Main Functions of a Gate Driver
Basic Functional Blocks of a Gate Driver
Gate Driver Related Characterization of Power Semiconductors
Gate Driver Design Basics
Protection for Voltage Source Converter Applications
Summary and Key Message

4. Outline Gate Driver for Wide Bandgap Power Semiconductors
Gate Driver Fundamentals
Main Functions of a Gate Driver
Basic Functional Blocks of a Gate Driver
Gate Driver Related Characterization of Power Semiconductors
Gate Driver Design Basics
Protection for Voltage Source Converter Applications
Summary and Key Message

5. Fundamentals of a Good Gate Driver
Static requirement
Dynamic requirement
Protection (Advanced function)
Keep the switch in ON state
Minimize ON state voltage and corresponding conduction losses
Safely keep the switch in OFF state
Minimize leakage current
Prevent spurious change of the switch state due to external or internal disturbances
Dynamic requirement should also be short circuit;
Protection – often over-temperature
Drive the switch from ON to OFF and OFF to ON state, with
Low switching losses
Acceptable EMI
Low commutation over-voltage
Protect the switch in case of any hazardous situation
Over-current
Over-voltage
Over-temperature

6. Basic Functional Blocks of a Gate Driver
Signal and power maybe combined; also upper lower components of gate driver can be combined – more options
Function of each gate driver block
Gate driver IC & Buffer: switch the power device with sufficient driving capability
Signal Isolator: provides galvanic isolation between the control loop and power loop
Isolated Power Supply: power secondary side of isolator, gate driver IC & buffer

7. Gate Driver for Wide Band-gap Switches
Wide band-gap vs. Silicon
High breakdown electric field
High doping density
High drift velocity
High thermal conductivity
Wide band-gap switches vs. Silicon switches
High breakdown voltage → High voltage application
Small ON state resistance
Fast switching speed
Small thermal resistance → High operation temperature
Special requirements of gate driver for wide band-gap switches
High galvanic isolation capability
High common mode transient & ringing immunity capability
High operation temperature capability
→ High dv/dt, di/dt, more parasitic ringing

8. Outline Gate Driver for Wide Band-gap Power Semiconductors
Gate Driver Fundamentals
Gate Driver Related Characterization of Power Semiconductors
Static Characteristics
Dynamic Characteristics
Gate Driver Design Basics
Protection for Voltage Source Converter Applications
Summary and Key Message

9. Static Characteristics
Output characteristics
Minimize the on-state voltage drop and conduction loss
Gate voltage maximum ratings
Control gate-source voltage within the required range
VCC = 15 V for Si
VCC = 20 V for SiC
Type
Manufacturer
Model
Gate voltage maximum ratings
Si MOSFET
Microsemi
APT34M120J
+30 V / -30 V
SiC MOSFET
CREE
C2M D
+25 V / -10 V

10. Switching Commutation — Load Current Flows In
Ac current source
Into should be in in title
If current flows into middle point
Commutation between lower switch & upper diode
Upper switch operates as a synchronous switch

11. Switching Commutation — Load Current Flows Out
Ac current source
If current flows out of middle point
Commutation between upper switch & lower diode
Lower switch acts as a synchronous switch

12. Equivalent Circuit of Switching Commutation
Load current flows into the middle point
Load current flows out of the middle point
Switching performance is impacted by
Power semiconductors
Gate driver
Operating Conditions

13. Dynamic Characteristics
Power semiconductors
Crss: Miller capacitance (i.e., Cgd)
Ciss: input capacitance
(i.e., sum of Cgd & Cgs)
Coss: output capacitance
(i.e., sum of Cgd & Cds)
Rg(in): internal gate resistance of device
Vth: threshold voltage
gfs: transconductance
Gate driver
Rg(ext): external gate resistance
Rg(dr): internal resistance of gate driver
Vdr: output voltage of gate driver
Operating conditions
Vdc: dc bus voltage
IL: inductive load current
Tj: junction temperature

14. Outline Gate Driver for Wide Band-gap Power Semiconductors
Gate Driver Fundamentals
Gate Driver Related Characterization of Power Semiconductors
Gate Driver Design Basics
Gate Driver Configuration
Gate Driver Isolations
Gate Driver IC & Gate Resistor
Case Study
Protection for Voltage Source Converter Applications
Summary and Key Message

15. Gate Driver Configuration
Gate driver mainly consists of
Signal isolator
Isolated PS
Gate driver IC
Gate resistor
Decoupling cap

16. Input to output capacitance
Signal Isolator
Isolate the ground of micro-controller and gate driver IC and safely transfer the control and error signal from the input to the output of the gate driver
Micro-controller
Gate driver IC
Selection criteria:
Galvanic isolation capability: greater than voltage rating of power switches
CM transient immunity: greater than dv/dt during switching transients
Maximum/minimum frequencies: cover required switching frequency range
Propagation delay: determined by switching frequency & control accuracy
Galvanic isolation
> 1500 V
Propagation delay
< 100 ns
CM transient immunity
> 50 kV/µs
Input to output capacitance
1..10 pF
Minimum frequency
0 Hz (DC)
Maximum frequency
10 kHz…1MHz

17. CM Transient Immunity for Signal Isolator
CM transient immunity: source & effects
Switching transitions cause high dv/dt across the signal isolator
Coupling capacitances offer the parasitic paths
dv/dt coupled through the parasitic paths leads isolator to lose control by inadvertently triggering a function or causing false feedback.
Typical dv/dt for wide bandgap switches
SiC discrete switch (CREE CMF20120D): ~ 30 kV/µs
SiC power module (CREE CPM B): ~ 80 kV/µs
GaN transistor (Transphorm TPH3006PD): ~ 140 kV/µs
Commercial available signal isolator
Types
Opto-coupler
Magnetically-coupler
Capacitive-coupler
CMTI
30 kV/µs
35 kV/µs
50 kV/µs

18. Isolated Power Supply Power supply is the “gas tank” of a gate driver.
Provides necessary voltage for operation of the gate driver circuits
Signal isolator
Provides necessary voltage for driving the switch into ON and OFF state
The output stage supply
Selection Criteria:
Galvanic isolation capability: greater than voltage rating of power switches
CM transient immunity: greater than dv/dt during switching transients
Output power: greater than power dissipation by secondary side of signal isolator, gate driver IC, and output stage
Output voltage: static & dynamic requirements, maximum ratings
𝑷 𝒐𝒖𝒕 > 𝑷 𝒊𝒔𝒐 + 𝑷 𝒈𝒅 + 𝑷 𝒔𝒘
(1)
𝑷 𝒔𝒘 =( 𝑽 𝑪𝑪 − 𝑽 𝑬𝑬 )× 𝑸 𝒈 𝒇 𝒔
(2)
Piso: power dissipated by secondary side of isolator, obtained from the datasheet of the isolator
Pgd: power dissipated by gate driver IC, obtained from the datasheet of the gate driver IC
Psw: power dissipated during switching transition, calculated by (2)
VCC / VEE: positive/negative output voltage of gate driver IC
Qg: gate charge, obtained from the datasheet of the power device

19. Output Voltage for Isolated Power Supply
Static requirement
Minimize ON state resistance and conduction losses
Safely keep power switches in OFF state
Minimize leakage current
Sufficient margin to prevent spurious change of switch state due to the external or internal disturbance
Dynamic requirement
Fast turn-on and turn-off power switches
Maintain sufficient margin to not exceed gate voltage maximum ratings of power switches
VCC = 15 V for Si
VCC = 20 V for SiC
Remain should be keep/maintain

20. Gate Driver IC Gate driver IC is the “engine” of a gate driver.
Provides necessary voltage for driving the switch into ON and OFF state
Provides sufficient current to charge and discharge the switch input capacitance
Provides low impedance loop with quick response for fast switching
Selection criteria:
Operating voltage range: greater than VCC - VEE
Peak source / sink drive current: greater than 𝑉 𝐶𝐶 − 𝑉 𝐸𝐸 𝑅 𝑔
Propagation delay: determined by switching frequency & control accuracy

21. Gate Driver IC (cont’d)
Selection criteria (cont’d):
Rise / fall time of gate driver IC output voltage: shorter than switching delay time
On state resistance of S1 and S2: smaller than desired gate resistance

22. Gate Resistor
Gate resistor is the “gas pedal” of a gate driver, controlling the speed of switching transients.
Different turn-on & turn-off gate resistance
Selection criteria:
Resistance
Datasheet
Analytical calculation
Finally, tuned by set of experiments
Sometimes we also use capacitor
Power rating
𝑷 𝑹𝒈 =( 𝑽 𝑪𝑪 − 𝑽 𝑬𝑬 )× 𝑸 𝒈 𝒇 𝒔

23. Decoupling Capacitor
Decoupling capacitor is the “fuel injector” of the gate driver, providing the current pulse during switching transients
Selection criteria:
Voltage ratings:
Capacitance:
Types: ceramic (low equivalent series inductance)
𝑽 𝑪𝟏 > 𝑽 𝑪𝑪
𝑽 𝑪𝟐 >| 𝑽 𝑬𝑬 |
𝑪 𝟏 > 𝑸 𝒈 ∆ 𝑽 𝑪𝑪
𝑪 𝟐 > 𝑸 𝒈 ∆ 𝑽 𝑬𝑬
Sometimes we also use capacitor

24. Outline Gate Driver for Wide Bandgap Power Semiconductors
Gate Driver Fundamentals
Gate Driver Related Characterization of Power Semiconductors
Gate Driver Design Basics
Gate Driver Configuration
Gate Driver Isolations
Gate Driver IC & Gate Resistor
Case Study
Protection for Voltage Source Converter Applications
Summary and Key Message

25. Gate Driver Design — Case Study
Parameters of device under evaluation
Model
Voltage rating
Current rating
Rds(on)
C2M D
1200 V
20 100oC
80 mΩ
1. Signal Isolator 2. Isolated PS 3. Gate driver IC
4. Gate resistor 5. Decoupling capacitor

26. Gate Driver Design — Signal Isolator
Galvanic isolation capability: > 1200 V [based on datasheet]
CM transient immunity: > 50 V/ns [based on datasheet]
Maximum/minimum frequencies: > 100 kHz [based on applications]
Propagation delay: < 100 ns (1 % of minimum switching period)
Fall time
Rise time
Test conditions
18.4 ns
13.6 ns
VDD = 800 V
ID = 20 A
dv/dt (on)
dv/dt (off)
35 V/ns
47 V/ns
Transformer based isolator ADuM 5240 is selected
Insolation voltage
2500 Vrms
Maximum frequency
1 MHz
CM transient immunity
35 V/ns
Propagation delay
< 75 ns
Secondary side power dissipation
13 mW

27. Gate Driver Design — Isolated PS
Isolated power supply
Galvanic isolation capability: > 1200 V [based on datasheet]
CM transient immunity: > 50 V/ns [based on datasheet]
Output voltage: 20 V to -5 V [based on datasheet]
Output power: > W [based on datasheet and applications]
𝑷 𝒐𝒖𝒕 > 𝑷 𝒔𝒘 + 𝑷 𝒊𝒔𝒐 + 𝑷 𝒈𝒅
(1)
𝑷 𝒔𝒘 =( 𝑽 𝑪𝑪 − 𝑽 𝑬𝑬 )× 𝑸 𝒈 𝒇 𝒔
(2)
VCC
20 V
VEE
-5 V Qg
49.2 nC fs
100 kHz
Piso: power dissipated by secondary side of isolator
13 mW
Pgd: power dissipated by gate driver IC
23 mW
Psw: power dissipated during switching transition, calculated by (2)
123 mW
Traco power THB 3 series DC/DC converter is selected
Isolation voltage
3000 Vrms
Input-Output capacitance
13 pF
Power
3 W
Output voltage
24 V / 5 V

28. Gate Driver Design — Gate Drive IC
Operating voltage range: > (VCC - VEE) = 30 V [based on datasheet]
Peak source / sink drive current:
= (VCC - VEE)/Rg < (VCC - VEE)/Rg(in) = 6.5 A [based on datasheet]
Propagation delay: < 100 ns (1 % of minimum switching period)
Rise / fall time of the output voltage of gate driver IC:
< min (td(on), td(off)) = 12 ns [based on datasheet]
Pull-up / pull-down resistance: < Rg(desire) or << Rg(in) = 4.6 Ω
Rg(in)
4.6 Ω
td(on)
12 ns
td(off)
23.2 ns
Ciss
950 pF
IXYS IXDN_609 gate driver IC is selected
Operating voltage
4.5 V to 35 V
Peak source/sink current
9 A
Rise / fall time
7 / 5 ns 1.5 nF)
Propagation delay
40 ns 25 V)
Pull-up / pull-down resistance
0.5 / 0.33 Ω 25 V)
Quiescent power dissipation
23 mW
20 oC)

29. Gate Driver Design — Gate Resistor
Resistance: based on datasheet and finally tuned by set of experiments
Different turn-on & turn-off gate resistance
Using diode
Usually, turn-off gate resistance is smaller than turn-on
Power rating: > mW [based on datasheet and applications]
It is preferred to use several gate resistors in parallel to tune the resistance
𝑷 𝑹𝒈 =( 𝑽 𝑪𝑪 − 𝑽 𝑬𝑬 )× 𝑸 𝒈 𝒇 𝒔
VCC
20 V
VEE
-5 V Qg
49.2 nC fs
100 kHz

30. Gate Driver Design — Decoupling Capacitor
Voltage ratings [based on datasheet]
Capacitance [based on datasheet]
Types: surface mount ceramic capacitor
𝑽 𝑪𝟏 > 𝑽 𝑪𝑪 =𝟐𝟎 𝑽
𝑽 𝑪𝟐 > |𝑽 𝑬𝑬 |=𝟓 𝑽
𝑪 𝟏 > 𝑸 𝒈 ∆ 𝑽 𝑪𝑪 = 𝑸 𝒈 ( 𝒌 𝑮𝑺 × 𝑽 𝑪𝑪 ) =𝟎.𝟐𝟒𝟔 𝝁𝑭
𝑪 𝟐 > 𝑸 𝒈 ∆ 𝑽 𝑬𝑬 = 𝑸 𝒈 ( 𝒌 𝑮𝑺 × 𝑽 𝑬𝑬 ) =𝟎.𝟗𝟖𝟒 𝝁𝑭
VCC
20 V
VEE
-5 V Qg
49.2 nC
kGS: Gate voltage ripple coefficient during switching transient 1%

31. Outline Gate Driver for Wide Bandgap Power Semiconductors
Gate Driver Fundamentals
Gate Driver Related Characterization of Power Semiconductors
Gate Driver Design Basics
Protection for Voltage Source Converter Applications
Cross-Talk
Over-Current
Summary and Key Message

32. Mechanism Causing Cross-Talk (Turn-On)
Lower switch as the device under test
Lower switch turned on, Vds_H rises
Displacement current 1 from Cgd_H
Current 1 flows into gate loop (2) & Cgs_H (3), inducing +Vgs_H
If positive Vgs_H > Vgs(th)
Excessive switching losses
Generate shoot through current 4

33. Mechanism Causing Cross-Talk (Turn-Off)
Lower switch as the device under test
Lower switch turned off, Vds_H falls
Displacement current 1 from Cgd_H
Current 3 flowing into Cgs_H induce -Vgs_H
If negative Vgs_H < Vgs_max(-) *
Overstress the upper switch
* Vgs_max(-) refers to maximum negative biased gate voltage required by power device itself.

34. Cross-Talk for WBG Switches (SiC as an Example)
Characteristics of Several Comparable Si / SiC Power Devices
Type
Manufacturer
Model
VDS / ID
(100 oC)
Qgs
Vgs(th)
(25 oC)
Vgs_max(-)
Si IGBT IR
IRGP20B120U
1200 V / 20 A
169 nC
4.5 V
-20 V
Si MOSFET
Microsemi
APT34M120J
1200 V / 22 A
560 nC
4.0 V
-30 V
SiC MOSFET
CREE
C2M D
1200V / 20 A
49.2 nC
2.2 V
-10 V
Properties of high voltage SiC devices
Faster switching speed
Lower threshold voltage
Lower maximum allowable negative gate voltage
SiC devices in a phase-leg configuration are easily affected by cross-talk, leading to
Extra switching losses & reliability issues

35. Basic Ideas for Cross-Talk Suppression
To suppress cross-talk, we need to minimize spurious Vgs_H
Reduce gate loop impedance during the switching transient
Gate impedance regulation (GIR) assist circuit
Pre-charge the gate-source capacitance before the switching transient
Gate voltage control (GVC) assist circuit
Turn-on transient of lower switch as an example

36. Gate Impedance Regulation (GIR) Assist Circuit
Logic signals
Compared with conventional gate driver, GIR assist circuit adds
One auxiliary transistor (Sa_H or Sa_L) in series with one capacitor (Ca_H or Ca_L) for each device in a phase-leg.

37. Operating Principle of GIR Circuit (Turn-On)
Lower switch as the device under test
Lower switch turned on; Sa_L remained off; Sa_H turned on
Lower switch
Ca_L disconnected
Turn-on performance of lower switch not affected
Upper switch
Ca_H connected; gate impedance of the upper switch minimized
Cross-talk mitigated; turn-on energy loss reduced

38. Operating Principle of GIR Circuit (Turn-Off)
Lower switch as the device under test
Lower switch turned off; Sa_L remained off; Sa_H remained on
Lower switch
Ca_L disconnected
Turn-off performance of lower switch not affected.
Upper switch
Ca_H connected; gate impedance of the upper switch minimized
Cross-talk mitigated; negative spurious gate voltage minimized

39. Parameter Design Criterion
Simplified equivalent circuit of upper switch during switching transient of lower one
Spurious gate voltage &
auxiliary capacitor voltage
To avoid cross-talk
Spurious gate voltage ∈( 𝑉 𝑔𝑠_max⁡(−) , 𝑉 𝑔𝑠(𝑡ℎ) )
∆𝑉 + + |∆𝑉 − | ≤ 𝑉 𝑔𝑠 𝑡ℎ − 𝑉 𝑔𝑠_max⁡(−) , where ΔV+ & ΔV- are related to C
𝑉 𝑔𝑠_𝑚𝑎𝑥(−) + ∆𝑉 − ≤ 𝑉 2 (𝑖.𝑒., 𝑉 𝐸𝐸 )≤ 𝑉 𝑡ℎ − ∆𝑉 +
where ∆V+, ∆V-, and V2 refer to positive spurious gate voltage, negative spurious gate voltage, and negative turn-off gate voltage, respectively. C is the auxiliary capacitor

40. GIR Assist Circuit Design — Case Study
Parameters of device under evaluation
Cgd
13 pF
Cgs
1900 pF
Vgs(th)
2.5 V
Vgs_max(-)
-5 V
Vdc
800 V
aON*
27 V/ns
Rg(in)
5 Ω
aOFF*
23 V/ns
* determined according to test results.
Selection ranges of C
Selection ranges of V2

41. Turn-on Transient of the Lower Switch
8.4% ↑
7.5% ↑
9.7% ↑
6.7% ↓
8.3% ↓
10.6% ↓
[1] Zheyu Zhang, “Active gate driver for cross talk suppression of SiC power devices in a phase-leg configuration”, in Proc. IEEE Trans. Power Electronics, vol. 29, no. 4, 2014.

42. Turn-on Transient of the Lower Switch (cont’d)
Total Eon reduction
13.0% ↓
15.9% ↓
19.4% ↓
6.3% ↓
7.6% ↓
8.8% ↓

43. Turn-off Transient of the Upper Switch

44. Outline Gate Driver for Wide Bandgap Power Semiconductors
Gate Driver Fundamentals
Gate Driver Related Characterization of Power Semiconductors
Gate Driver Design Basics
Protections for Voltage Source Converter Applications
Cross-Talk
Over-Current
Summary and Key Message

45. Short Circuit Modes & Causes
Arm Short Circuit Transistor or diode destruction
Series Arm Short Circuit Faulty gate drive signal
Short in LoadMiswiring or load short circuit
Ground FaultMiswiring or dielectric breakdown
[1]:Fuji IGBT modules application manual, 2004.

46. Fault Type-Hard Switching Fault (HSF)
HSF--Short circuit fault at turn-on switching transient
Hard switching fault circuit and related waveforms

47. Fault Type-Fault Under Load (FUL)
FUL--Short circuit fault during the on-state condition
Gate and fault current spike
Fault under load circuit and related waveforms

48. Fault Type - Example
A protection circuit (e.g., desaturation protection) should be activated within the short circuit withstand time tsc
HSF & Tj = 25 oC
FUL & Tj = 25 oC
Gate voltage spike
vgs (10 V/div)
vgs (10 V/div)
tsc=11.5 μs
tsc=12 μs
id (66 A/div)
id (66 A/div)
vds (200 V/div)
vds (200 V/div)
vpt (10 V/div)
t (5 us/div)
vpt (10 V/div)
t (5 us/div)
Test Condition: Vgs = +20/-2V, Vdc = 600 V, CREE 1G SiC MOSFETs (1200 V / 24 A)

49. IGBT Desaturation Protection
Under steady-state conduction, IGBT operates in saturation region
Under short circuit condition, IGBT operation point moves from saturation region to active region, so-called “Desaturation” or “Desat”
Typical IGBT output characteristics
Ic   Vce 
A short circuit protection can be triggered by the increased collector-emitter voltage Vce

50. Desaturation Protection for SiC MOSFET
Challenges :
Commercial IGBT/MOSFET gate drivers usually have slow fault response time (>3 μs) versus short short-circuit withstand time (SCWT) of SiC devices

51. Desaturation Protection for SiC MOSFET
Challenges (cont’d):
Protection threshold for SiC MOSFETs is not straightforward due to unclearly defined active region
Output characteristics
M: Operating point
N: Protection point

52. Blanking Time vs. Noise Immunity
Challenges (cont’d):
The noise immunity and fault response time become sharp contradictions
Vds
Protection circuit can be falsely triggered due to high dv/dt during turn- on/turn-off transients
Large Cblk/Cj, large Rsat2 could more effectively suppress the impact of dv/dt on Vdesat, while blanking time will increase

53. Blanking Time Setting Solution
Reduction of fault response time with acceptable noise immunity capability so that fault response time << short-circuit withstand time
Blanking time is determined by the RC network (Rsat1, Rsat2, and Cblk) :
The blanking time is:
Blanking time tblanking > Turn-on switching time ton
Z. Wang, X. Shi, Y. Xue, L.M. Tolbert, F. Wang, B.J. Blalock, “Design and Performance Evaluation of Overcurrent Protection Schemes for Silicon Carbide (SiC) Power MOSFETs”, IEEE Transactions on Industrial Electronics, Volume: 61 , Issue: 10, Publication Year: 2014, Page(s):

54. Desaturation Technique – Testing Results
Vdc = 750 V, 200 oC, Vgs = +20/-2V, Blanking time:100 ns, CREE 2G SiC MOSFET
Hard Switching Fault
Fault Under Load
Drain-Source Voltage
(200 V/div)
Drain-Source Voltage
(200 V/div)
Drain Current
(50 A/div)
Drain Current
(50 A/div)
Gate Voltage
(10 V/div)
Gate Voltage
(10 V/div)
Threshold:5 V
Threshold:5 V
Capacitor Voltage
(5 V/div)
Capacitor Voltage
(5 V/div) t1 t2 t3
t (200 ns/div) t1 t2 t3
t (200 ns/div)
Total response time: 195 ns
Blanking time delay (t1~t2): 130 ns
Comparator response delay (t2~t3): 65 ns
Total response time: 85 ns
Blanking time delay (t1~t2): 20 ns
Comparator response delay (t2~t3): 65 ns

55. Outline Gate Driver for Wide Bandgap Power Semiconductors Cross-Talk
Gate Driver Fundamentals
Gate Driver Related Characterization of Power Semiconductors
Gate Driver Design Basics
Protections for Voltage Source Converter Applications
Cross-Talk
Over-current
Summary and Key Message

56. Summary & Key Message No power conversion without power semiconductors
Power semiconductors is NOTHING without a gate driver!
The gate driver will properly drive a power semiconductor and bring the maximum performance. For WBG devices,
Driving capability of gate driver IC (rise/fall time, pull-up/pull-down resistance) & CM transient immunity of gate driver isolation are special requirements.
The gate driver will protect a power semiconductor and entire converter if something goes wrong. For WBG devices,
Cross-talk is easily induced, leading to potential hazard of shoot- through failure and gate terminal reliability issues. A gate assist circuit was introduced for cross-talk suppression.
Short circuit capability is limited. The desaturation protection circuit with < 200 ns response time was described for device reliability enhancement.
Not sure why the driving capability is special for WBG
Cross-talk part is too long
Over temperature protection is needed

57. Thank you for your attention !
Questions?