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Modular DC-DC System Design Done Right

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Presentation on theme: "Modular DC-DC System Design Done Right"— Presentation transcript:

1 Modular DC-DC System Design Done Right
Authors: Jon Siegers, Sr. Applications Engineer Vamshi Domudala, Applications Engineer ©2019 Vicor

2 Contents DC-DC Modules System Integration and Support Circuitry
System Design Process and Example System Integration and Support Circuitry Power Source and Decoupling Input Filter and Stability Analysis Output Filter and Transient Response Special Load Considerations Safety and Protections Current Sharing and Fault Tolerant Arrays Signaling and I/O ©2019 Vicor

3 DC-DC Power Modules High performance Flexibility Faster development
Delivering power reliably and efficiently is paramount in modern systems A variety of module classes are available, offering qualified power dense solutions capable of high efficiency and superior dynamic performance Flexibility Modularity is a key benefit and provides flexibility to construct complex power system architectures quickly and reliably Solutions are easily scaled to meet design requirements Operating requirement changes late in the system design cycle are easily remedied with footprint compatible devices Faster development Shorten design time with building-block approach to power system construction Minimize technical risk Power system designers need no longer concern themselves with power FET selection, converter topology details, or the even the minutiae of magnetics design to achieve a platform capable of reliably delivering on the necessary power requirements Widespread proliferation of power conversion modules means power system designers can rapidly design and build high performance, low cost DC-DC systems out of modular power conversion components Modular DC-DC converter building blocks minimize technical risk and are a faster, and perhaps most significantly, scalable means for developing a power system ©2019 Vicor

4 System Design Process Identify system requirements and module options
High-level definition of system operation Review available power components and modules Organize and classify the system inputs and outputs Develop system architecture and select power components to fulfill conversion needs Is this a complete system design from primary power source to load or a branch addition to an existing system? Formulate a power delivery strategy using available modules and construct a block diagram Implementation of modules and support circuitry Finalize module configurations Identify necessary circuitry for interfacing modules and performing specialized functions Power system designers need no longer concern themselves with power FET selection, converter topology details, or the even the minutiae of magnetics design to achieve a platform capable of reliably delivering on the necessary power requirements Widespread proliferation of power conversion modules means power system designers can rapidly design and build high performance, low cost DC-DC systems out of modular power conversion components Modular DC-DC converter building blocks minimize technical risk and are a faster, and perhaps most significantly, scalable means for developing a power system ©2019 Vicor

5 Identify System Requirements: What operating conditions must the DC-DC system fulfill?
Tabularize the system operating voltages, currents, power levels Keep track of any needed special trim ranges or operating functions, sequencing needs and redundancy requirements, etc. Output # VIN VOUT IOUT Notes 1 384VDC (n+1) 1.2V 120A Tight voltage regulation, 200A peak current 2 2.2V 60A Current regulation, load specification may change 3 3.3V 7.5A 4 5V 20A 5 24V 12A 6 48V 16A ©2019 Vicor

6 System Architecture and Block Diagram
Start by laying out the system outputs ? 1.2V, 130A ? 2.2V, 60A ? 3.3V, 7.5A ? 5V, 20A ? 24V, 12A ? 48V, 16A ©2019 Vicor

7 System Architecture and Block Diagram
VTM Partition the system and identify power module class Consider physical constraints of system, including: Available space for power module location Needs for isolation Special PDN architectures PRM 1.2V, 130A VTM PRM VTM 2.2V, 60A 48V niPOL 3.3V, 7.5A niPOL 5V, 20A DC/DC 24V, 12A 384V DC/DC 48V, 16A DC/DC ©2019 Vicor

8 System Architecture and Block Diagram
VTM 90.3% Work back towards the input, using data sheet efficiency estimates to compute upstream conversion power requirements PRM 1.2V, 130A VTM 89.7% PRM VTM BUS CONV 2.2V, 60A 96.2% 48V, 8.9A 88.6% niPOL 3.3V, 7.5A BUS CONV 4.2A 92.2% niPOL 384V 5V, 20A (N+1) 92.0% DC/DC 24V, 12A 384V, 3.0A DC/DC 91.5% 48V, 16A DC/DC ©2019 Vicor

9 System Architecture and Block Diagram
VTM 90.3% Refine system efficiency estimates and incorporate late power requirement changes PRM 1.2V, 130A VTM VTM 90.5% PRM BUS CONV 2.2V, 120A VTM 96.9% 48V, 12A 88.6% niPOL BUS CONV 3.3V, 7.5A 4.6A 92.2% niPOL 5V, 20A 384V (N+1) 92.0% DC/DC 24V, 12A 384V, 3.0A DC/DC 91.5% 48V, 16A DC/DC ©2019 Vicor

10 Implementation and Support Circuitry
A module or collection of modules is not a complete power system Compliance with EMI standards requires additional filtering Protections are often narrow and limited to the module only Source and load characteristics dictate decoupling needs Specialized loads and dynamic response characteristics Redundancy requirements for high-reliability applications Connection to system controllers and power sequencing ©2019 Vicor

11 What Else Do I Need? 1. Source and Source Impedance
2. Input Line Impedance 3. Safety 4. Decoupling Capacitor 5. Input Filter 7. Output Filter 8. Output Line Impedance 6. Protection ©2019 Vicor

12 Power Source Interconnection
©2019 Vicor

13 Defining the Power Source
Understanding the characteristics of the DC power source is critical for ensuring system performance and stability Large-signal characteristics Available power Range of supplied voltage Behavior during dropouts or other non-linear behaviors Small-signal characteristics Output impedance of power source Output impedance of interconnect power distribution path ©2019 Vicor

14 Filtering ©2019 Vicor

15 Filtering: What are the noise sources in a power system?
Switching action and parasitics tend to generate noise currents Two types of noise currents are generated Common-mode noise Differential-mode noise Due to the switching action and parasitics in the switching power converters, they tend to generate noise currents at the switching frequency and its higher-order harmonics. The noise currents are of two types, common mode and differential mode noise. ©2019 Vicor

16 Filtering: Electromagnetic interference
Problems associated with noise interference Erratic system operation Sensitivity to noise generated by neighboring systems Input filters bypass the switching converter noise locally to ground Reduces interference with other systems connected to the same source Reduces the system susceptibility to noise The noise currents may interfere with the power source operation and other systems sharing the same connection. Interference between the switching converters and other systems connected to the same source leads to the system malfunction. Also the switching converter itself should not be much susceptible to noise (sensitive to noise generated by neighbor systems). Therefore, an input filter is often used between the power source and the switching converter to lower the conducted electromagnetic interference (EMI) and to provide input voltage noise rejection. Introduction of input filters will bypass the noise generated by the switching converters locally to the ground, in turn reduces the electromagnetic interference with other systems connected to the same source and reduces the system susceptibility to noise. ©2019 Vicor

17 Filtering: Does it need to comply with any standards?
Depending on the application the EMI filter have to meet certain EMC standards EMC: Electromagnetic compatibility EMI : Electromagnetic interference EMC standards are regulated by various international laws Application Category Standard Defense MIL-STD-461 Commercial/Industrial CISPR-22, EN55022 Class A, FCC Domestic/Residential CISPR-22, EN55022 Class B, FCC Automotive CISPR-25 Transportation EN50155 ©2019 Vicor

18 Filtering: Noise-mitigation techniques
Usually requires several discrete components Common-Mode Elements Common-mode choke, Y-capacitors Differential-Mode Elements Inductors, X-capacitors, damping elements The differential mode and common mode noise generated by the DC-DC converter can be reduced by adding EMI filter at the input of the converter. EMI filter consists of differential mode and common mode elements. Common mode elements such as Y-capacitors (CY1-6), common mode inductor (LCM) provide common mode noise filtering. LCM provides high impedance path to the common mode noise, CY3-6 provides low impedance path to the CM noise. The leakage inductance (Llkg) of the common mode inductor acts as a differential mode inductor, typically the leakage inductance is roughly 1-3% of the common mode inductance depending on its construction. Similarly, differential mode elements such as X-capacitors (CX), differential mode inductors or leakage inductance (Llkg) provide differential mode noise filtering. Llkg provides high impedance path to the differential mode noise, CX provides low impedance path to the DM noise. ©2019 Vicor

19 Simplified series-damped
LC Filter Topology Circuit Diagram Attenuation Characteristics Frequency Response Plot Undamped Simplified series-damped Series-damped Passive filter topologies characteristics Undamped Included for illustrative purposes only. This topology is not recommended for use in any designs due to its lack of damping (only damping present is due to parasitics, which will be insufficiency in any real world application). The associated resonance will cause issues with EMI performance and system stability; it will  also cause voltage overshoot/undershoot that may damage the downstream converter. Simplified series-damped Low component count compared to parallel and series-damped filters. Parallel resistor Rd damps LC resonance – the drawback is the addition of a zero at high frequency. Overall attenuation characteristics are similar to a first order filter. Series-damped Size of the filter is small compared to parallel-damped filter. Inductor Lb ensures that high frequency attenuation characteristic retains a second order roll-off characteristic. Parallel-damped Similar to the series-damped, the Rd – Cd parallel branch ensures the high frequency roll-off remains -40dB/dec. Note that the Rd – Cd parallel branch can be replaced with a higher ESR aluminum electrolytic capacitor. Parallel-damped ©2019 Vicor

20 System Stability Analysis
𝑇 𝑀𝐿𝐺 = 𝑍 𝑆𝑂𝑈𝑅𝐶𝐸 𝑍 𝐿𝑂𝐴𝐷 ≪1 𝑉 𝑂𝑈𝑇 𝑉 𝐼𝑁 = 𝐾 𝑆𝑂𝑈𝑅𝐶𝐸 ∙𝐾 𝐿𝑂𝐴𝐷 ∙ 𝑍 𝐿𝑂𝐴𝐷 𝑍 𝑆𝑂𝑈𝑅𝐶𝐸 + 𝑍 𝐿𝑂𝐴𝐷 = 𝐾 𝑆𝑂𝑈𝑅𝐶𝐸 ∙𝐾 𝐿𝑂𝐴𝐷 ∙ 1 1+ 𝑇 𝑀𝐿𝐺 Standalone Stable System Minor Loop Gain Regulated modules may interact unexpectedly with power source impedance Frequency-dependent, finite source impedance Power source bandwidth limitations Cable length Filtering Regulated DC-DC modules appear as constant-power loads Improperly damped input filter and converter input form negative resistance oscillator ZSOURCE ZLOAD VBUS VIN 𝐾 𝑆𝑂𝑈𝑅𝐶𝐸 = 𝑉 𝐵𝑈𝑆 𝑉 𝐼𝑁 𝐾 𝐿𝑂𝐴𝐷 = 𝑉 𝑂𝑈𝑇 𝑉 𝐵𝑈𝑆 VOUT ©2019 Vicor

21 Decoupling Capacitor Design Source Impedance
ZSOURCE ZIN-CONVERTER LLINE RLINE ZSOURCE-IN ZLINE ZSOURCE-C = (ZSOURCE-IN + ZLINE) // (ZC + ESR) ZIN-CONVERTER LLINE RLINE ZSOURCE-IN C ESR ©2019 Vicor

22 Filtering: Does the input filter introduction cause stability issues with source?
Interaction between ZTOTAL_SOURCE and ZIN_CONVERTER results in DC-DC converter control-loop instability, degradation of dynamic performance Input voltage oscillations during start up, load steps and other transients Proper damping of filter prevents interaction Sufficient separation between the impedances ensures no impact on system stability Note: The analysis should take place at low line and full power to account for the worst case converter ZIN_CONVERTER Introducing a filter at the input of a DC-DC converter without considering its impact on the switching converter dynamics can lead to system-level stability issues. In order to analyze the system, it is divided into two subsystems, source and load subsystems. Source subsystem is combination of source impedance, line impedance and input filter impedance. Load subsystem is DC-DC converter. By plotting the total source impedance looking back into the output of the filter and the input impedance of the DC-DC converter will provide a better insight on interaction between the impedances. ©2019 Vicor

23 Output filter design Based on the application’s transient requirements, select the filter inductor using below equation Select filter cut-off frequency to meet the attenuation characteristics Find filter capacitor value using 𝐿= 𝑉 𝑜𝑢𝑡_𝑐𝑜𝑛𝑣𝑒𝑟𝑡𝑒𝑟 − 𝑉 𝑜𝑢𝑡_𝑙𝑜𝑎𝑑 𝑑 𝑖 𝑙𝑜𝑎𝑑 𝑑𝑡 ©2019 Vicor

24 Filtering: Is physical location important?
Impact of PCB layout on filter performance? Physically locate EMI filters close to the switching converters Minimizes the effect of trace resistance inductance Keeps the high dI/dt current loop areas small Minimize trace inductance and trace resistance Provide keep-out area to avoid parasitic capacitance (capacitive coupling between the traces) Differential-mode Inductors Common-mode chokes Filtering: Is physical location important? Keep high dI/dt current loop areas small by placing the X and Y-capacitors close to the converter. Differential-mode AC currents will flow through the input X-capacitors and internal FETs of the converter, forming a current loop. Common mode AC currents will flow through the Y-capacitors and other circuit parasitic capacitances. The high dI/dt currents will generate eddy currents, resulting in magnetic fields; the stray magnetic fields increase the noise interference with the nearby electronic circuitry and can potentially result in radiated emission issues. Therefore, minimize current-loop areas by placing the input X-capacitors and Y-capacitors closer to the input leads of the converter. As a result, the ability of a conductor to couple energy by induction and radiation will significantly reduce. Impact of PCB layout on filter performance? Minimize trace inductance and trace resistance Keep out area for differential mode inductors to reduce the effect of parasitic capacitance Parasitic capacitance across the differential mode inductor will alter the filter attenuation characteristics Keep out area for common mode chokes to avoid electric field interference with the traces underneath the CM chokes Keep out area to avoid capacitive coupling between the traces ©2019 Vicor

25 Filtering: Component de-rating and cold-temperature performance
The value of the capacitor changes over applied voltage, temperature, frequency and aging Characteristic X7R Tantalum Polymer Aluminum Polymer Aluminum Electrolytic Temperature ( 𝐶 /𝐶) ±15% ±10% 25 to –30% DC voltage coefficient (%) at Vr –20% Negligible 10 to –15% Aging Rate (%hr/Decade) 2% N.A Resistance to thermal and mechanical shock Moderate to Low High Moderate to High DC Bias characteristics (reference: KEMET) Temperature characteristics (reference: Evans Capacitor) The value of the capacitor changes over applied voltage, temperature and frequency DC bias characteristics: For the high dielectric constant capacitors, the value of the capacitor decreases with the increase in the applied voltage Temperature characteristics: The value of the capacitor changes over temperature depending on the dielectric material used for construction ©2019 Vicor

26 Load Considerations ©2019 Vicor

27 Affects control loop response
Load Characteristics Dealing with Inductive Loads Load Type Affects control loop response Affects transient response No Yes Possibly At the turnoff instance, the energy stored in the inductive loads will generate Large negative voltage spikes High-frequency noise or EMI that can affect DC-DC converter performance Arcing Load Characteristics: Combination of different load types can yield an infinite range of load characteristics Dealing with inductive loads: At the turnoff instance of the inductive load, the energy stored in the inductive loads will generate Large negative voltage spikes High frequency noise or EMI that can affect DC-DC converter performance Arcing To prevent any damage during turnoff time, the energy stored in the inductive load must be dissipated by clamping the voltage across the inductive load ©2019 Vicor

28 Loads: Pulse Loads Power Averaging Energy storage factors to consider:
DC-DC converters sized for peak load requirements add unnecessary size, weight and cost Support circuitry such as bypass capacitors, heat sinks, cooling systems needed Alternative solution is using power-averaging technique Avoids additional weight, size and cost Storage element sized to keep the voltage drop within load tolerances DC-DC Converter factors to consider: Current and power limit DC-DC converter capacitance limits Stability of the DC-DC converter Energy storage factors to consider: Voltage rating: ≥140% than operating voltage Temperature: high temp. for reliability Type: performance vs. volume Loads: Pulse Loads There are many applications where a load will draw power from its source in short bursts. The load is on for a short duration then turns off and then this cycle repeats. In most applications the power supply is sized as if the load is on continuously. If the load is 3KW and is on for 1ms and off for 5ms the supply is configured for 3KW even though the average power in this case is only 500 watts. In applications where size and weight are critical and the load is only on for a short duration and is repetitive, the DC-DC converters can be sized for the average power delivery. When designing the power system for continuous operation at peak power even though the average power is much less, support circuitry such as bypass caps, heat sinks and system fans would need to be considered. This support circuitry takes up more system real estate and makes it even more difficult to stay within space and weight constraints. Therefore, designing the power system for the average power can be a better alternative. Power Averaging The average power delivery by using a current limiting converter and a capacitor to supply peak power needs. When configuring such a power system the designer must take into account the current limit, power limit and stability of the power supply as well as sizing the capacitor properly to keep the voltage drop at the load within its tolerances. Applications such as pulsed amplifiers, flashing LED lights and re-closures can take advantage of power averaging to reduce cost, space and weight within the system. As system power levels increase many designers are finding it difficult to stay within space and weight constraints for the power supply in these types of systems. ©2019 Vicor

29 Safety and Protections
©2019 Vicor

30 Fusing Requirements Safety Agency Conditions of Acceptability require power module inputs be fused Consult latest available module safety agency documentation for fusing requirements Fuses are a critical safety element, performing two main functions Limit the extent of thermal damage and prevent fire in the event of a overload or short-circuit event Isolate faulted subsystems ©2019 Vicor

31 Fuse Placement Bus Conv niPOL niPOL ©2019 Vicor

32 Fuse Selection: Current Rating and Temperature Re-rating
Usually greater than the maximum continuous operating current of the protected system In regulated systems this condition occurs at minimum input voltage, full load 𝐼 𝐼𝑁−𝑀𝐴𝑋 = 𝑃 𝑂𝑈𝑇−𝑀𝐴𝑋 𝑉 𝐼𝑁−𝑀𝐼𝑁 ∙ 𝜂 𝑆𝑌𝑆 A standard derating of 25 – 50% is applied to account for fuse aging and to guard against nuisance tripping Consult fuse manufacturer’s data sheet for temperature re-rating chart Lower fuse current rating permissible for operation less than 25°C Additional derating for operation above 25°C ©2019 Vicor

33 Fusing: Voltage and Interrupt Current Rating
DC voltage rating of fuses correspond to the maximum withstand voltage tolerable and must not be exceeded Fuses are not responsive to voltage fluctuations Voltage rating of fuse must meet or exceed the maximum expected voltage of the application Proper selection of an appropriately rated fuse is a safety-critical design choice Interrupt current rating dictates the maximum fault current that can be broken by the fuse at rated voltage The interrupt current rating of the fuse must meet or exceed the maximum available short circuit fault current of the protected circuit Note that fuse voltage rating and interrupt current specifications may depend on whether the application is AC or DC ©2019 Vicor

34 Fusing: Nominal Melting I2t
IPK t t0.5 0.5 IPK Pulse 𝐼 2 𝑡= 𝐼 𝑃𝐾 2 𝑡 Pulse 𝐼 2 𝑡=0.72∙ 𝐼 𝑃𝐾 2 𝑡 0.5 Fusing: Nominal Melting I2t Frequent pulse current overloads lead to premature thermal fatigue of fuse element Module start-up inrush Capacitive charging Externally introduced transients Determine fused system’s expected pulse energy waveform and compare to I2t rating of fuse Fuse melting I2t rating must be greater than the expected pulse I2t multiplied by a pulse scaling factor, PF Number of Surge Pulses Pulse Factor (PF) 100 2.1 1000 2.6 10000 3.4 100000 4.5 𝐼 2 𝑡 𝑚𝑖𝑛 = 𝐼 2 𝑡(𝑝𝑢𝑙𝑠𝑒)∙PF ©2019 Vicor

35 Additional Fusing Considerations
Fuses should be installed on the ungrounded side of the circuit to ensure an uninterrupted connection to low potential is present when the fuse is opened Consider special environmental conditions of the application. e.g., Fuses are not directly suitable for submerged use in liquid immersion cooling applications Current carrying conductors/traces, including the chassis ground, must be sized to safely carry 150 – 200% of the fuse current rating with acceptable temperature rise depending on applicable Safety Standards Modules sourced by a dual-biased supply require separate fusing of both the positive and negative terminals ©2019 Vicor

36 Spike and Surge Transients
Spike (<1ms duration) V90% V10% fosc trise tduration Spike and Surge Transients Power modules must be withstand input voltage transients outside of specified operating range Inductive load switching, motor speed changes Fault clearing or momentary power interruptions Level of transient suppression depends on the severity of the incoming voltage transient and with the requirements of any applicable standards Surge (>1ms duration) VPK V90% V10% trise twidth VNOM Transient Event MIL-STD-1275A/B/D/E Spikes ±250VDC for 70μs Surges 100VDC for 50ms Other Transient Specifications include: MIL-STD704, DO-160, IEC , ISO7637-2, ISO7636-3 ©2019 Vicor

37 Two-Stage Transient Protection Circuit
TVS diodes provide fast transient suppression on the order of 100μs High voltage, low energy spike clipping Typically coupled with a low-Q LC filter for larger energy transients Upstream fuse needed to protect TVS diode Series combinations preferred for increased PPP handling Transient and surge mitigation can be accomplished with a two stage protection circuit. The first stage consists of a TVS diode across the DC bus for fast transient suppression on the order of 100’s of microseconds. When a high voltage transient does occur, the device clamps the voltage by avalanche breakdown. This is good enough for arresting high amplitude, low energy spikes and is typically coupled with a damped LC filter for integrating the transient energy. Before selecting the optimum TVS component, there are important transient voltage suppressor (TVS) characteristics that require careful comparisons to circuit component limitations and transient conditions. When using these TVSs, the most important parameters to consider are the rated working peak voltage, or rated standoff voltage (VRWM), the peak pulse power dissipation (PPP), peak impulse current (IPP), and clamping voltage (VC). The first step in selecting a TVS is to determine the highest continuous peak normal operating voltage at the point of intended protection in the circuit. This should include continuous dc or repetitive ac peak voltages, such as sinusoidal peaks intended for normal operation. This also excludes any higher undesired voltage transients that need to be clamped or suppressed. This operating voltage will then determine the rated standoff voltage (VWM) selection of the TVS component. This is also identified as the rated working peak voltage for the selected TVS device, where it provides high impedance and low standby current (ID) in the circuit during normal operation. Although most of the electrical characteristics are given only for 25 °C conditions in TVS datasheets, the VWM is a value that is also applicable over the specified operating temperature range. This is typically –55 °C to 150 °C for plastic components and –55 °C to 175 °C for glass or metal hermetically sealed components. The next higher voltage characterized for TVS devices is the breakdown voltage (VBR). It is typically 10% to 15% above VWM and is the voltage in which TVS devices go into avalanche, similar to a zener diode. It may be specified with both minimum and maximum, or with just the minimum at a relatively low specified current value. The VBR also has a temperature coefficient of αV(BR), similar to zeners in that it must be considered when operating over a broad temperature range. When devices are operated in cold conditions (down to –55 °C, for example), the VBR declines in value thus reducing the margin remaining between VWM. The highest voltage parameter specified for a TVS is VC, or clamping voltage, under high-current pulse conditions. It is typically 35% to 40 % higher than VBR (or 60 % higher than VWM) and represents the maximum clamping voltage during the specified peak impulse current IPP. When making this VC comparison to the circuit, it is important that the clamping voltage does not exceed the instantaneous voltage level acceptable for safe operating conditions of the other components that are protected by the TVS in the circuit. Most of this VC voltage increase above the initial VBR is a result of the positive temperature effects from energy and heat inside the TVS component that is briefly generated during the high-current surge event. All TVS devices are rated in various peak pulse power dissipation (PPP) levels to allow economic and safe suppression of a variety of different surge conditions. This typically ranges from 150 W to 90,000 W and higher for Microsemi TVS components in safely clamping various impulses. To select a component in PPP by calculated methods, it is necessary to define the transient conditions in peak impulse current (IPP), pulse width, and waveform. The PPP is the product of the clamping voltage multiplied by the peak impulse current, or PPP = VC × IPP. Since the maximum VC can be identified by its relation with the previously selected VWM, the IPP is the only other item needed to determine PPP. This worst-case surge current can be determined if the open-circuit-transient voltage (VOC) and short circuit current (ISC) are identified. These conditions are often included in various industry standards, such as the IEC , , and international standards (or RTCA/DO-160 for avionics). These describe ESD, EFT, and lightning conditions, respectively, for the IEC standards. When surge conditions are identified in this manner, source impedance (ZS) can be determined by Ohm's Law, where ZS = VOC/ISC. Any other resistance in the circuit (RC) between the transient source and the TVS location should also be included before calculating the peak impulse current IPP value. Other inductance and capacitance effects in the line have been neglected for this simplified worst-case analysis. With these values we can again determine: IPP = (VOC–VC) / (ZS+RC) by Ohm's Law. Surge events by their very nature can sometimes be allusive or undefined. If the surge conditions are not known with open-circuit transient voltage and short-circuit current, or by means of oscilloscope evaluation during a surge event, other guidelines can also serve as approximations in selecting a TVS. There are three basic levels of protection (that have been recognized in the industry), where TVS components may be used or located at primary, secondary, and board levels. Since the last one requires the lowest PPP protection, we will start with that example first. Board-level designs can still experience high-voltage spikes but also have the highest source or circuit resistance. As a result of these current limiting effects, they have the lowest comparative peak impulse currents and transient PPP requirements. Applications at this level often use TVS power selections of 400 W to 600 W at 10/1000 μs or 300 W to 500 W at 8/20 μs. These latter shorter-pulse width ratings are designed for ESD threats and low-level induced lightning at the board level that are suitable for protection against HBM test levels up to 15,999 V and higher. In secondary-level designs, the areas that need protection will normally be preceded with a transformer Microsemi Proprietary and Confidential. MicroNote 125 Revision B 3 In secondary-level designs, the areas that need protection will normally be preceded with a transformer or a given series resistance and inductance. The peak impulse currents are greater than board level, but not of the high level otherwise experienced on low impedance lines. A 1500 W TVS will typically be sufficient for most of these secondary protection levels. However, engineering judgment should still be used for each example. There are also individual TVS components now available up to 5000 W, or even 15,000 W, without resorting to larger arrays. These can also be useful if tighter clamping voltage ratios (V C/VWM) are needed. This is achievable by simply oversizing the TVS in PPP to reduce the VC experienced from a specific known surge condition. See MicroNote 108 for further details. The primary level of protection is the most severe transient environment. It usually has a very low source impedance, as well as a low series resistance. For example, this might involve transmission lines that are exposed to the highest degree of voltage transients, such as power switching or lightning strikes. As a result of this combination, a single TVS may not be adequate protection. However Microsemi does offer a series of custom modules involving TVS arrays to fit individual requirements with up to 90 kW of PPP or higher. Like any of the silicon pn junction TVSs, these larger TVS designs also do not have wear-out mechanisms as do other high-power suppression devices, like MOVs. TVS Diode Characteristic Selection Criteria VRWM Max working voltage of the protected circuit VBR (110 – 115% VRWM) and VC (130 – 140% VBR) Less-than-max instantaneous voltage module can tolerate ©2019 Vicor

38 Two-Stage Transient Protection Circuit
Active clamp stage reduces blocks longer duration surge voltages FET selection dependent on the acceptable input voltage range of the module Oscillator and charge pump for high side N-channel FET drive N-channel preferred for generally lower RDSON characteristics FET Characteristic Selection Criteria VDS Greater-than-peak surge voltage ID Module full-load input current RDSON Acceptable system efficiency penalty and thermal strategy SOA and Transient Thermal Impedance Evaluate against specific clamping requirements and module input power Longer duration surge lasting 10s to 100s of ms require a secondary protection mechanism. The active clamp stage comprised of a series FET acts as a linear voltage regulator to clamp the module input voltage within an acceptable range. The circuit makes use of N-channel FETs despite the additional complexity of high-side drive as N-channel devices will have a 2-3x lower Rdson than comparably rated P-channel devices. Keep in mind that this FET will be conducting the module input current, dissipating power according to its square by the FET drain source resistance. The penalty here is overall system efficiency. The FET should be rated to withstand the peak surge voltage amplitude in the event the FET must be completely disabled. It must also be rated to conduct the full module input current when fully enhanced during normal operation. The SOA and Transient Thermal Impedance information provided by the FET manufacturer must be reviewed to ensure the FET is within acceptable operating regions. Additional drive circuitry includes an oscillator and charge pump for generating the FET gate drive and a comparator for feedback control of the FET gate voltage. ©2019 Vicor

39 Current Sharing and Fault-Tolerant Arrays
©2019 Vicor

40 Current Sharing of Module Arrays
Parallel modules to expand total output power capability of system Be aware of any power de-rating for arrayed modules Start up into load capacitance Fault recovery coordination Load currents should be evenly shared among paralleled modules Maximizes reliability of arrayed modules in terms of thermal stress Droop sharing Active current sharing Current sharing and concepts discussed on this slide must be presented without reference to any Vicor products. Keep the discussion on parallel arrays general in nature. ©2019 Vicor

41 Array Input / Output Filtering: Decoupling for beat frequencies
Undesired beat frequencies at the common input and output bus Part-to-part variability results in slightly different switching frequencies Circulating AC ripple currents can cause interference leading to system stability and power quality issues Chaotic condition in the feedback control loops Output voltage oscillations due to one converter’s switching-frequency noise being the other converter’s high-frequency perturbation Two major problems associated with the parallel operation of DC-DC converters are as follows: Beat frequency noise at the common input and output bus Chaotic condition in the feedback control loops of the DCMs, which leads to oscillations in the output voltage Although the parallel connected DC-DC converters are of the same type and are designed to operate at same switching frequencies, due to part-to-part variability, the DC-DC converters in a parallel array configuration will operate at slightly different operating points. As a result, the converters switch at different frequencies. The interaction among the switching noise of each converters in a parallel array results in undesired beat frequencies at the common input and output bus. As a result, AC ripple currents circulating in the input and output sections of the converters are increased. The path of the circulating AC ripple currents is depicted in Figure, shown in the slide. The beat frequencies generated are the differences between the operating frequencies of the DC-DC converters, which is given by the Equation fb = |fsw1-fsw2|. For example, the DC-DC converter1 and DC-DC converter2 with the nominal switching frequency of 1MHz might have the operating switching frequencies of fSW1 = 1MHz and fSW2 = 1.02MHz. Thus, the resulting beat frequency noise fb will be much lower in frequency i.e., fb = 20kHz. The total AC ripple current in the input and output of the DCMs will have much lower, 20kHz, frequency component, which is difficult to filter out using a typical filtering network. The circulating AC ripple currents can cause interference between the interconnected systems, which in turn can lead to the system stability and power quality issues. The circulating AC ripple currents also cause stress in the converter’s internal bypass capacitors, and in some cases the converter itself can detect a false positive fault condition. In parallel operation of the DC-DC converters, the output nodes of each converters are connected at the common bus. The output of each converter comprises the DC component and the AC ripple related to the relative converter’s switching frequency. At the common node, the interactions between the feedback control loop of each converter may result in oscillations in the output voltage. The oscillations in the output voltage are a result of one converter’s switching frequency noise being the other converter’s high-frequency perturbation. To prevent beat frequency oscillations in the parallel converter system, the injected AC ripple currents from each converter must be limited. This can be achieved by adding a small value of an inductor and low-ESR capacitors (such as ceramic capacitors) at the input and output of each converter, as shown in Figure. The inductor increases the interconnected line impedance at high frequency, resisting the flow of AC ripple currents. Thus, placing the ceramic capacitors on the common output bus after the decoupling inductors aides in attenuating the circulating AC ripple currents. Hence, the magnitude of the beat frequency oscillations are drastically reduced. ©2019 Vicor

42 Redundant Operation Fault-tolerant arrays prevent system downtime due to module failure Addition of extra module (N+1) or modules (N+M) increases reliability with modest cost increase OR-ing of module outputs for output short circuit fault tolerance Diodes add losses, should be run hot to minimize forward voltage drop FETs incur smaller efficiency penalty ©2019 Vicor

43 Signaling and I/O ©2019 Vicor

44 Control: Typical control I/O
Analog interface Control Output voltage trim Enable/disable Monitoring Fault Temperature Digital / PMBus® interface Control Output voltage trim Enable/disable Fault protection set points (Input UVLO, OVLO, current limit etc.) Monitoring Fault Temperature Input/output voltages and currents ©2019 Vicor

45 Control: Remote sense Remote Sense function of modules negate effect of line impedances on voltage regulation Integrated within module, pins provided External loop and compensation network interface to module trim Kelvin connect the remote sense lines at the point-of-load to avoid introducing error in high-current systems ©2019 Vicor

46 Control: Signal vs. power grounds
Differentiating signal vs. power grounds will avoid potential noise interference from the power grounds to the signal grounds Power grounds carry much larger currents and consists of switching noise generated the DC-DC converter’s switching action Due to the trace parasitics, noise currents through the power ground will cause small differences in the power ground potential Methods for connecting the signal and power grounds Connect the group of signal grounds at one single point of the power ground plane Separate the two grounds by adding a high impedance from power ground to signal ground ©2019 Vicor

47 Thank you Questions? The information contained herein and presented by Vicor is for general informational purposes only. Vicor assumes no responsibility for inaccuracies, errors or omissions in this presentation. Users of power supply products remain responsible for the design, testing and operational safeguards related to such use. PMBus® is a registered trademark of SMIF, Inc. ©2019 Vicor


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