2.  Both data about the physical world and control signals sent to interact with the physical world are typically "analog" or continuously varying quantities.  In order to use the power of digital electronics, one must convert from analog to digital form on the experimental measurement end and convert from digital to analog form on the control or output end of a laboratory system.

5.  Analog output is typical of most transducers and sensors.  Need to convert these analog signals into a digital representation so the microcontroller can use it.  Some characteristics of analog signals.  Maximum and minimum voltages  Precise continuous signals  Rate of voltage change  Frequency if not a steady state signal 5/19/2019ECE2655

6.  Representing a continuously varying physical quantity by a sequence of discrete numerical values. PNJ 10/28/2004Telekomunikasi 26 03 07 10 14 09 02 00 04

7.  Ramp ADC  Successive Approximation  Flash Comparison PNJ 10/28/2004Telekomunikasi 27

8.  The basic principle of operation is to use the comparator principle to determine whether or not to turn on a particular bit of the binary number output.  It is typical for an ADC to use a digital-to- analog converter (DAC) to determine one of the inputs to the comparator.

9.  Most A-D converters use a comparator as part of the conversion process  A comparator compares 2 signals A and B ▪ if A > B the comparator output is in one logic state (1, say) ▪ if B > A then it is in the opposite state (0, say)  A comparator can be built using an op amp with no feedback

10.  3 Basic Types  Digital-Ramp ADC  Successive Approximation ADC  Flash ADC

11.  Conversion from analog to digital form inherently involves comparator action where the value of the analog voltage at some point in time is compared with some standard.  A common way to do that is to apply the analog voltage to one terminal of a comparator and trigger a binary counter which drives a DAC.

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13.  The output of the DAC is applied to the other terminal of the comparator.  Since the output of the DAC is increasing with the counter, it will trigger the comparator at some point when its voltage exceeds the analog input.  The transition of the comparator stops the binary counter, which at that point holds the digital value corresponding to the analog voltage.

14.  Conversion from analog to digital form inherently involves comparator action where the value of the analog voltage at some point in time is compared with some standard.  A common way to do that is to apply the analog voltage to one terminal of a comparator and trigger a binary counter which drives a DAC.

15. PNJ 10/28/2004Telekomunikasi 215

16.  Much faster than the digital ramp ADC because it uses digital logic to converge on the value closest to the input voltage.  A comparator and a DAC are used in the process.

17. Successive-Approximation A/D Successive Approximation Register D/A Converter V ref clock analog input Digital Output Data At initialization, all bits from the SAR are set to zero, and conversion begins by taking STRT line low. comparator STRT

18. Successive Approximation Register D/A Converter V ref clock analog input Digital Output Data comparator STRT Successive-Approximation A/D First the logic in the SAR sets the MSB bit equal to 1 (+5 V). Remember that a 1 in bit 7 will be half of full scale.

19. Successive Approximation Register D/A Converter V ref clock analog input Digital Output Data comparator STRT Successive-Approximation A/D The output of the SAR feeds the D/A converter producing an output compared to the analog input voltage. If the D/A output is < Vin then the MSB is left at 1 and the next bit is then tested.

20. Successive Approximation Register D/A Converter V ref clock analog input Digital Output Data comparator STRT Successive-Approximation A/D If the D/A output is > Vin then the MSB is set to 0 and the next bit is set equal to 1.

21. Successive bits are set and tested by comparing the DAC output to the input V in in an 8 step process (for an 8-bit converter) that results in a valid 8-bit binary output that represents the input voltage.

22. CLOCK PERIOD ¼FS ½FS ¾FS 1 2 3 4 5 6 7 8 analog input voltage D/A output for 8-bit conversion with output code 1011 0111

23. Successive approximation search tree for a 4-bit A/D 1111 1110 1101 1100 1011 1010 1001 1000 0111 0110 0101 0100 0011 0010 0001 D/A output compared with V in to see if larger or smaller

24. Note that the successive approximation process takes a fixed time - 8 clock cycles for the 8-bit example. For greater accuracy, one must use a higher bit converter, i.e. 10-bit, 12-bit, etc. However, the depth of the search and the time required increases with the bit count.

25. PNJ 10/28/2004Telekomunikasi 225 If N is the number of bits in the output word…. Then 2 N comparators will be required.

26.  It is the fastest type of ADC available, but requires a comparator for each value of output. (63 for 6-bit, 255 for 8-bit, etc.)  Such ADCs are available in IC form up to 8-bit and 10-bit flash ADCs (1023 comparators) are planned.  The encoder logic executes a truth table to convert the ladder of inputs to the binary number output. Illustrated is a 3-bit flash ADC with resolution 1 volt

27.  The resistor net and comparators provide an input to the combinational logic circuit, so the conversion time is just the propagation delay through the network - it is not limited by the clock rate or some convergence sequence.

28.  Misalkan bilangan biner dengan n bit digunakan untuk mewakili nilai analog mulai dari 0 ke A  There are 2 n possible numbers  Resolution = A / 2 n  FS = (2 n -1) step size PNJ 10/28/2004Telekomunikasi 228

29.  Temperature range of 0 K to 300 K to be linearly converted to a voltage signal of 0 to 2.5 V, then digitized with an 8-bit A/D converter  2.5 / 2 8 = 0.0098 V, or about 10 mV per step  300 K / 2 8 = 1.2 K per step PNJ 10/28/2004Telekomunikasi 229

30.  Temperature range of 0 K to 300 K to be linearly converted to a voltage signal of 0 to 2.5 V, then digitized with a 10-bit A/D converter  2.5 / 2 10 = 0.00244V, or about 2.4 mV per step  300 K / 2 10 = 0.29 K per step PNJ 10/28/2004Telekomunikasi 230

31.  Setiap konversi memiliki ketidakpastian rata-rata setengah ukuran langkah ½ (A / 2N) PNJ 10/28/2004Telekomunikasi 231

32.  Waktu yang dibutuhkan untuk memperoleh sampel dari sinyal analog dan menentukan representasi numerik. PNJ 10/28/2004Telekomunikasi 232