1. YOUR PROJECT TITLE By Your Name1. (Your Reg Number1) Your Name2
YOUR PROJECT TITLE By Your Name1 (Your Reg Number1) Your Name2 (Your Reg Number2) Your Name3 (Your Reg Number3) Under the Guidance of Your Guide Name (Ex: Mr/Mrs/Dr.SSSSS BE.,ME.,Phd.,)

2. Area
VLSI
Low Power VLSI

3. Source of the Base Paper
R. Zimmermann, W Fichtner, “Low-Power Logic Styles:
CMOS versus Pass - Transistor Logic”, IEEE Journal of Solid
State Circuits, Vol. 32, No 7, Jul 1997.

4. Objective of Base Paper

5. Explanation of the Base Paper
Methodology
Block Diagram/Flow Chart
Tools / Software used
Analysis and Discussions 5

6. Problems Identified

7. References [1] Chandrakasan, A., and Brodersen, Low Power Digital
Design, Kluwer Academic Publishers, R., 1995.