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Electrical Characteristics Practice Problems 1
with Solutions Last Mod January 2008 Paul R. Godin
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Calculations Calculate the values for each circuit using values from the specification sheets. Use the TI specification sheets for TTL Use the OnSemi Specification sheets for CMOS Answers at the end of the presentation…
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Problem #1 Determine the B to C propagation delay for the following circuit: NAND gate is a 4011B Point A is a logic Low
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Problem #2 Determine the propagation delay for the following circuit, assuming the inverter is a 74S04, the NAND gate is a 4093B and the OR is a 7432.
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Problem #3 Determine the fanout for a 4049UB connecting to 74LS08’s.
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Problem #4 Determine the fanout for a 7400 connecting to 14584B’s.
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Problem #5 Determine the noise margin for a 4011B connecting to a 7404.
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Problem #6 Determine the noise margin for a 7408 connecting to 4050B’s.
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Problem #7 Determine the Power requirements for a 74LS08 with:
2 gates with a high output 2 gates with a low output
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Answers…
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Problem #1 Solution tPLH: 250s tPHL: 250s
Determine the B to C propagation delay for the following circuit: NAND gate is a 4011B Point A is a logic Low tPLH: 250s tPHL: 250s The specifications are based on the outputs. tPLH tPHL tPHL tPLH tPLH tPHL Answer is 750ηs
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Problem #2 Solution Determine the propagation delay for the following circuit, assuming the inverter is a 74S04, the NAND gate is a 4093B and the OR is a 7432. tPLH: 15s tPHL: 22s tPLH: 250s tPHL: 250s tPLH: 4.5s tPHL: 5s tPLH tPHL tPHL tPLH tPLH tPHL Answer is 276.5ηs
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Problem #3 Solution Determine the fanout for a 4049UB connecting to 74LS08’s. IIH: 20μA IIL: 0.4mA IOH: 1.25mA IOL: 3.2 mA Answer: Fanout = 8 Gate inputs
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Problem #4 Solution Determine the fanout for a 7400 connecting to 14584B’s. IIH: 0.1μA IIL: 0.1μA IOH: 0.4mA IOL: 16mA Answer: Fanout = 4000 Gate inputs
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Problem #5 Solution Determine the noise margin for a 4011B connecting to a 7404. Minimum Minimum 4011B: VOH: 4.95 V VOL: 0.05 V 7400: VIH: 2.0 V VIL: 0.8V Maximum Maximum Output Input
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Problem #6 Solution Determine the noise margin for a 7408 connecting to 4050B’s. Minimum Minimum VOH: 2.4 V VOL: 0.4 V VIH: 3.5 V VIL: 1.5V Maximum Maximum Output Input Noise Margin problem!
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Problem #7 Solution Determine the Power requirements for a 74LS08 with: 2 gates with a high output 2 gates with a low output ICCH: 4.8mA ICCL: 8.8mA
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END January 2008 Paul R. Godin gmail.com
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