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Instructor: Alexander Stoytchev

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1 Instructor: Alexander Stoytchev
CprE 281: Digital Logic Instructor: Alexander Stoytchev

2 Signed Numbers CprE 281: Digital Logic Iowa State University, Ames, IA
Copyright © Alexander Stoytchev

3 Administrative Stuff HW5 is out It is due on Monday Oct 2 @ 4pm.
Please write clearly on the first page (in block capital letters) the following three things: Your First and Last Name Your Student ID Number Your Lab Section Letter Also, please staple all of your pages together.

4 Administrative Stuff Labs Next Week Mini-Project
This one is worth 3% of your grade. Make sure to get all the points. 2017_Fall_281/labs/Project-Mini/

5 Quick Review

6 (there are four possible cases)
Adding two bits (there are four possible cases) [ Figure 3.1a from the textbook ]

7 Adding two bits (the truth table)
[ Figure 3.1b from the textbook ]

8 Adding two bits (the logic circuit)
[ Figure 3.1c from the textbook ]

9 The Half-Adder [ Figure 3.1c-d from the textbook ]

10 Addition of multibit numbers
Bit position i [ Figure 3.2 from the textbook ]

11 Analogy with addition in base 10
c3 c2 c1 c0 x2 x1 x0 y2 y1 y0 s2 s1 s0 +

12 Analogy with addition in base 10
+

13 Analogy with addition in base 10
carry +

14 Analogy with addition in base 10
c3 c2 c1 c0 x2 x1 x0 y2 y1 y0 s2 s1 s0 +

15 Problem Statement and Truth Table
[ Figure 3.2b from the textbook ] [ Figure 3.3a from the textbook ]

16 Let’s fill-in the two K-maps
[ Figure 3.3a-b from the textbook ]

17 Let’s fill-in the two K-maps
[ Figure 3.3a-b from the textbook ]

18 The circuit for the two expressions
[ Figure 3.3c from the textbook ]

19 This is called the Full-Adder
[ Figure 3.3c from the textbook ]

20 (si can be implemented in two different ways)
XOR Magic (si can be implemented in two different ways)

21 A decomposed implementation of the full-adder circuit
HA c x i HA c c y i + 1 i (a) Block diagram c i s i x i y i c i + 1 (b) Detailed diagram [ Figure 3.4 from the textbook ]

22 A decomposed implementation of the full-adder circuit
HA c x i HA c c y i + 1 i (a) Block diagram c i s i x i y i c HA i + 1 HA (b) Detailed diagram [ Figure 3.4 from the textbook ]

23 The Full-Adder Abstraction
HA c x i c i 1 + HA c y i

24 The Full-Adder Abstraction
FA x i c i 1 + y i

25 We can place the arrows anywhere
xi yi ci+1 FA ci si

26 n-bit ripple-carry adder
x y x y x y n – 1 n 1 1 1 c 1 c c n FA c n 1 2 FA FA c s s s n 1 1 MSB position LSB position [ Figure 3.5 from the textbook ]

27 n-bit ripple-carry adder abstraction
x y x y x y n – 1 n 1 1 1 c 1 c c n FA c c n 1 2 FA FA s s s n 1 1 MSB position LSB position

28 n-bit ripple-carry adder abstraction
x y x y x y n – 1 n 1 1 1 c c n s s s n 1 1

29 The x and y lines are typically
grouped together for better visualization, but the underlying logic remains the same x n – 1 c n y s

30

31 Math Review: Subtraction
39 15 - ??

32 Math Review: Subtraction
39 15 - 24

33 Math Review: Subtraction
82 61 - ?? 48 26 - ?? 32 11 - ??

34 Math Review: Subtraction
82 61 - 21 48 26 - 22 32 11 - 21

35

36 Math Review: Subtraction
82 64 - ?? 48 29 - ?? 32 13 - ??

37 Math Review: Subtraction
82 64 - 18 48 29 - 19 32 13 - 19

38

39 The problems in which row are easier to calculate?
82 61 - ?? 48 26 - ?? 32 11 - ?? 82 64 - ?? 48 29 - ?? 32 13 - ??

40 The problems in which row are easier to calculate?
82 61 - 21 48 26 - 22 32 11 - 21 Why? 82 64 - 18 48 29 - 19 32 13 - 19

41 Another Way to Do Subtraction
82 – 64 = –

42 Another Way to Do Subtraction
82 – 64 = – = (100 – 64) - 100

43 Another Way to Do Subtraction
82 – 64 = – = (100 – 64) - 100 = ( – 64) - 100

44 Another Way to Do Subtraction
82 – 64 = – = (100 – 64) - 100 = ( – 64) - 100 = (99 – 64)

45 Another Way to Do Subtraction
82 – 64 = – = (100 – 64) - 100 = ( – 64) - 100 Does not require borrows = (99 – 64)

46 9’s Complement (subtract each digit from 9)
99 64 - 35

47 10’s Complement (subtract each digit from 9 and add 1 to the result)
99 64 - = 36

48 Another Way to Do Subtraction
82 – 64 = (99 – 64)

49 Another Way to Do Subtraction
9’s complement 82 – 64 = (99 – 64)

50 Another Way to Do Subtraction
9’s complement 82 – 64 = (99 – 64) =

51 Another Way to Do Subtraction
9’s complement 82 – 64 = (99 – 64) 10’s complement =

52 Another Way to Do Subtraction
9’s complement 82 – 64 = (99 – 64) 10’s complement = =

53 Another Way to Do Subtraction
9’s complement 82 – 64 = (99 – 64) 10’s complement = = // Add the first two. =

54 Another Way to Do Subtraction
9’s complement 82 – 64 = (99 – 64) 10’s complement = = // Add the first two. = // Just delete the leading 1. // No need to subtract 100. = 18

55

56 Formats for representation of integers
b b b n 1 1 Magnitude MSB (a) Unsigned number b b b b n 1 n 2 1 Magnitude Sign 0 denotes + 1 denotes MSB (b) Signed number [ Figure 3.7 from the textbook ]

57 Negative numbers can be represented in following ways
Sign and magnitude 1’s complement 2’s complement

58 1’s complement Let K be the negative equivalent of an n-bit positive number P. Then, in 1’s complement representation K is obtained by subtracting P from 2n – 1, namely K = (2n – 1) – P This means that K can be obtained by inverting all bits of P.

59 Find the 1’s complement of …

60 Find the 1’s complement of …
Just flip 1's to 0's and vice versa.

61 A) Example of 1’s complement addition
( + 5 ) + ( + 2 ) + ( + 7 ) [ Figure 3.8 from the textbook ]

62 A) Example of 1’s complement addition
( + 5 ) + ( + 2 ) + ( + 7 )

63 B) Example of 1’s complement addition
( - 5 ) + ( + 2 ) + ( - 3 ) [ Figure 3.8 from the textbook ]

64 B) Example of 1’s complement addition
( - 5 ) + ( + 2 ) + ( - 3 )

65 C) Example of 1’s complement addition
( + 5 ) + ( 2 ) + ( + 3 ) 1 [ Figure 3.8 from the textbook ]

66 C) Example of 1’s complement addition
( + 5 ) + ( 2 ) + ( + 3 ) 1

67 C) Example of 1’s complement addition
( + 5 ) + ( 2 ) + But this is 2! ( + 3 ) 1

68 C) Example of 1’s complement addition
( + 5 ) + ( 2 ) + ( + 3 ) 1 1 We need to perform one more addition to get the result.

69 C) Example of 1’s complement addition
( + 5 ) + ( 2 ) + ( + 3 ) 1 1 We need to perform one more addition to get the result.

70 D) Example of 1’s complement addition
( 5 ) + ( 2 ) + ( 7 ) 1 [ Figure 3.8 from the textbook ]

71 D) Example of 1’s complement addition
( 5 ) + ( 2 ) + ( 7 ) 1

72 D) Example of 1’s complement addition
( 5 ) + ( 2 ) + But this is +7! ( 7 ) 1

73 D) Example of 1’s complement addition
( 5 ) + ( 2 ) + ( 7 ) 1 1 We need to perform one more addition to get the result.

74 D) Example of 1’s complement addition
( 5 ) + ( 2 ) + ( 7 ) 1 1 We need to perform one more addition to get the result.

75 2’s complement Let K be the negative equivalent of an n-bit positive number P. Then, in 2’s complement representation K is obtained by subtracting P from 2n , namely K = 2n – P

76 Deriving 2’s complement
For a positive n-bit number P, let K1 and K2 denote its 1’s and 2’s complements, respectively. K1 = (2n – 1) – P K2 = 2n – P Since K2 = K1 + 1, it is evident that in a logic circuit the 2’s complement can computed by inverting all bits of P and then adding 1 to the resulting 1’s-complement number.

77 Find the 2’s complement of …

78 Find the 2’s complement of …
Invert all bits.

79 Find the 2’s complement of …
1 + 1 + 1 + 1 + Then add 1.

80 Quick Way to find 2’s complement
Scan the binary number from right to left Copy all bits that are 0 from right to left Stop at the first 1 Copy that 1 as well Invert all remaining bits

81 Find the 2’s complement of …

82 Find the 2’s complement of …
Copy all bits that are 0 from right to left.

83 Find the 2’s complement of …
Stop at the first 1. Copy that 1 as well.

84 Find the 2’s complement of …
Invert all remaining bits.

85 Interpretation of four-bit signed integers
[ Table 3.2 from the textbook ]

86 Interpretation of four-bit signed integers
The top half is the same in all three representations. It corresponds to the positive integers.

87 Interpretation of four-bit signed integers
In all three representations the first bit represents the sign. If that bit is 1, then the number is negative.

88 Interpretation of four-bit signed integers
Notice that in this representation there are two zeros!

89 Interpretation of four-bit signed integers
There are two zeros in this representation as well!

90 Interpretation of four-bit signed integers
In this representation there is one more negative number.

91 The number circle for 2's complement
[ Figure 3.11a from the textbook ]

92 A) Example of 2’s complement addition
( + 5 ) + ( + 2 ) + ( + 7 ) [ Figure 3.9 from the textbook ]

93 B) Example of 2’s complement addition
+ 2 ( ) 5 3 [ Figure 3.9 from the textbook ]

94 C) Example of 2’s complement addition
+ 1 ignore 5 ( ) 3 2 [ Figure 3.9 from the textbook ]

95 D) Example of 2’s complement addition
+ 1 ignore 5 ( ) 7 2 [ Figure 3.9 from the textbook ]

96

97 Naming Ambiguity: 2's Complement
2's complement has two different meanings: representation for signed integer numbers algorithm for computing the 2's complement (regardless of the representation of the number)

98 Naming Ambiguity: 2's Complement
2's complement has two different meanings: representation for signed integer numbers in 2's complement algorithm for computing the 2's complement (regardless of the representation of the number) take the 2's complement

99 Example of 2’s complement subtraction
( + 5 ) ( + 2 ) + ( + 3 ) 1 ignore means take the 2's complement [ Figure 3.10 from the textbook ]

100 Example of 2’s complement subtraction
( + 5 ) ( + 2 ) + ( + 3 ) 1 ignore Notice that the minus changes to a plus. means take the 2's complement [ Figure 3.10 from the textbook ]

101 Example of 2’s complement subtraction
( + 5 ) ( + 2 ) + ( + 3 ) 1 ignore [ Figure 3.10 from the textbook ]

102 Example of 2’s complement subtraction
( + 5 ) ( + 2 ) + ( + 3 ) 1 ignore [ Figure 3.10 from the textbook ]

103 Graphical interpretation of four-bit
2’s complement numbers [ Figure 3.11 from the textbook ]

104 Example of 2’s complement subtraction
( 5 ) ( + 2 ) + ( 7 ) 1 ignore [ Figure 3.10 from the textbook ]

105 Example of 2’s complement subtraction
( + 5 ) ( 2 ) + ( + 7 ) [ Figure 3.10 from the textbook ]

106 Example of 2’s complement subtraction
( 5 ) ( 2 ) + ( 3 ) [ Figure 3.10 from the textbook ]

107 Taking the 2’s complement negates the number
decimal b3 b2 b1 b0 take the 2's complement +7 0111 1001 -7 +6 0110 1010 -6 +5 0101 1011 -5 +4 0100 1100 -4 +3 0011 1101 -3 +2 0010 1110 -2 +1 0001 1111 -1 +0 0000 -8 1000

108 Taking the 2’s complement negates the number
decimal b3 b2 b1 b0 take the 2's complement +7 0111 1001 -7 +6 0110 1010 -6 +5 0101 1011 -5 +4 0100 1100 -4 +3 0011 1101 -3 +2 0010 1110 -2 +1 0001 1111 -1 +0 0000 -8 1000 This is the only exception

109 Taking the 2’s complement negates the number
decimal b3 b2 b1 b0 take the 2's complement +7 0111 1001 -7 +6 0110 1010 -6 +5 0101 1011 -5 +4 0100 1100 -4 +3 0011 1101 -3 +2 0010 1110 -2 +1 0001 1111 -1 +0 0000 -8 1000 And this one too.

110 But that exception does not matter
( 5 ) ( 8 ) + ( + 3 ) ignore

111 But that exception does not matter
Add 8

112 But that exception does not matter
Subtract 8

113 Take-Home Message Subtraction can be performed by simply adding the 2’s complement of the second number, regardless of the signs of the two numbers. Thus, the same adder circuit can be used to perform both addition and subtraction !!!

114 Adder/subtractor unit
y y y n 1 1 Add Sub control x x x n 1 1 c n -bit adder c n s s s n 1 1 [ Figure 3.12 from the textbook ]

115 XOR Tricks y control out

116 XOR as a repeater y

117 XOR as an inverter y 1

118 Addition: when control = 0
y y y n 1 1 Add Sub control x x x n 1 1 c n -bit adder c n s s s n 1 1 [ Figure 3.12 from the textbook ]

119 Addition: when control = 0
y y y n 1 1 Add Sub control x x x n 1 1 c n -bit adder c n s s s n 1 1 [ Figure 3.12 from the textbook ]

120 Addition: when control = 0
y y y n 1 1 Add Sub control x x x n 1 1 yn-1 y1 y0 c n -bit adder c n s s s n 1 1 [ Figure 3.12 from the textbook ]

121 Subtraction: when control = 1
y y y n 1 1 Add Sub control x x x n 1 1 c n -bit adder c n s s s n 1 1 [ Figure 3.12 from the textbook ]

122 Subtraction: when control = 1
y y y n 1 1 1 Add Sub control 1 1 1 x x x n 1 1 c n -bit adder c n s s s n 1 1 [ Figure 3.12 from the textbook ]

123 Subtraction: when control = 1
y y y n 1 1 1 Add Sub control 1 1 1 x x x n 1 1 yn-1 y1 y0 c n -bit adder c n s s s n 1 1 [ Figure 3.12 from the textbook ]

124 Subtraction: when control = 1
y y y n 1 1 1 Add Sub control 1 1 1 x x x n 1 1 yn-1 y1 y0 c n -bit adder c n 1 carry for the first column! s s s n 1 1 [ Figure 3.12 from the textbook ]

125 Examples of determination of overflow
( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 [ Figure 3.13 from the textbook ]

126 Examples of determination of overflow
( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 Include the carry bits: c4 c3 c2 c1 c0

127 Examples of determination of overflow
( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 Include the carry bits: c4 c3 c2 c1 c0

128 Examples of determination of overflow
c 4 = 3 1 c 4 = 3 ( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) c 4 1 = 3 c 4 1 = 3 ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 Include the carry bits: c4 c3 c2 c1 c0

129 Examples of determination of overflow
c 4 = 3 1 c 4 = 3 ( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) c 4 1 = 3 c 4 1 = 3 ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 Overflow occurs only in these two cases.

130 Examples of determination of overflow
c 4 = 3 1 c 4 = 3 ( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) c 4 1 = 3 c 4 1 = 3 ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 Overflow = c3c4 + c3c4

131 Examples of determination of overflow
c 4 = 3 1 c 4 = 3 ( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) c 4 1 = 3 c 4 1 = 3 ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 Overflow = c3c4 + c3c4 XOR

132 Calculating overflow for 4-bit numbers
with only three significant bits

133 Calculating overflow for n-bit numbers with only n-1 significant bits

134 Detecting Overflow x y x y x y c c c FA c FA FA c s s s n – 1 n – 1 1
c 1 c c FA c FA FA c n n 1 2 s s s n 1 1

135 Detecting Overflow (with one extra XOR)
y x y x y n – 1 n 1 1 1 c 1 c c FA c FA FA c n n 1 2 s s s n 1 1 overflow

136 Another way to look at the overflow issue
X= x3 x2 x1 x0 Y= y3 y2 y1 y0 S= s3 s2 s1 s0 +

137 Another way to look at the overflow issue
X= x3 x2 x1 x0 Y= y3 y2 y1 y0 S= s3 s2 s1 s0 + If both numbers that we are adding have the same sign but the sum does not, then we have an overflow.

138 Examples of determination of overflow
( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1

139 Examples of determination of overflow
( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1

140 Examples of determination of overflow
3 = y s 1 x 3 1 = y s ( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) x 3 = y 1 s x 3 1 = y s ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1

141 Examples of determination of overflow
3 = y s 1 x 3 1 = y s ( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) x 3 = y 1 s x 3 1 = y s ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 In 2's complement, both +9 and -9 are not representable with 4 bits.

142 Examples of determination of overflow
3 = y s 1 x 3 1 = y s ( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) x 3 = y 1 s x 3 1 = y s ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 Overflow occurs only in these two cases.

143 Examples of determination of overflow
3 = y s 1 x 3 1 = y s ( + 7 ) ( 7 ) + + + ( + 2 ) + ( + 2 ) ( + 9 ) ( 5 ) x 3 = y 1 s x 3 1 = y s ( + 7 ) ( 7 ) + + + ( 2 ) + ( 2 ) ( + 5 ) 1 ( 9 ) 1 Overflow = x3 y3 s3 + x3 y3 s3

144 Another way to look at the overflow issue
X= x3 x2 x1 x0 Y= y3 y2 y1 y0 S= s3 s2 s1 s0 + If both numbers that we are adding have the same sign but the sum does not, then we have an overflow. Overflow = x3 y3 s3 + x3 y3 s3

145 Questions?

146 THE END


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