1. Active Filters Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Active Filters

2. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Introduction
Filtering: most common linear time-invariant (LTI) signal processing function – selecting the signal bandwidth of interest (in reality neither linear nor time-invariant)…
Categories: continuous time (CT), discrete time (DT)
analog filter, digital filter
(will focus on CT analog filters for this course)
Frequency domain: low-pass (LP), high-pass (HP), band-pass (BP)…
Time domain: impulse response, FIR, IIR…

3. Continuous-time, 1st-order, one real pole, low-pass
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Simple RC Filter
Continuous-time, 1st-order, one real pole, low-pass

4. Simple RC Filter Frequency response Impulse response
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Simple RC Filter
Frequency response
Impulse response

5. General Filter Specs Ideal LPF: More realistic: Non-causal
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
General Filter Specs
Ideal LPF:
Non-causal
Infinite complexity
More realistic:
Magnitude response
ωp, ωs, αp, and αs
Phase response

6. Example: 2nd-order VTF Continuous-time
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Example: 2nd-order VTF
Continuous-time
Where are the poles? (complex conjugate poles for maximum flatness)
Low-pass, high-pass, or band-pass?

7. Passive RLC Filter  No active component (low power)
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Passive RLC Filter 
No active component (low power)
Inductors are bulky and expensive to realize in IC’s
Values of R, L, and C will not track each other

8. Active OP-RC Filter  It’s active Inductor-less Area efficient
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Active OP-RC Filter
It’s active
Inductor-less
Area efficient
Values of R’s and C’s and their time co.’s won’t track each other – may lead to RC time constant variations of as high as 20%
RC time constant enters the VTF in product form – can be tuned for accuracy
Assuming ideal op amps, 

9. Continuous-Time Integrator
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Continuous-Time Integrator
Assuming ideal op amp,

10. Cascade Filter Design ‒ Biquads
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Cascade Filter Design ‒ Biquads

11. The leading minus sign in Hbq(s) is only for convenience
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Cascade Filter Design
For a real-coefficient H(s):
2nd-order
1st-order
Biquad:
The leading minus sign in Hbq(s) is only for convenience

12. Special Cases of Biquad
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Special Cases of Biquad

13. Q Factor of Poles Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Q Factor of Poles

14. Signal Flow Graph (SFG) for Biquad
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Signal Flow Graph (SFG) for Biquad 
Note: the partition of the biquadratic VTF is not unique

15. OP-RC Implementation Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
OP-RC Implementation

16. Alternative SFG for Biquad
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Alternative SFG for Biquad
Recast Hbq(s): 

17. Alternative OP-R-C Prototype
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Alternative OP-R-C Prototype

18. Cascade Filter Design For a real-coefficient H(s): 2nd-order 1st-order
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Cascade Filter Design
For a real-coefficient H(s):
2nd-order
1st-order
Order of cascade determines the signal dynamic range
Optimized using engineering rule of thumb or thru simulation

19. Biquad Cascade Filter Design
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Biquad Cascade Filter Design
Most flexible arrangement of cascade filter design
Allow independent, non-interacting control of (ω0, Q) for
pole pairs
Easy design
Components need to be scaled for maximum DR and minimum component spread
Pass-band sensitivity to capacitance variation is finite
→ Ladder filter can achieve zero sensitivity

20. Scaling of Active Filter
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Scaling of Active Filter

21. Typical Active Multi-Stage Filters
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Typical Active Multi-Stage Filters
Initial component values may not be optimal...

22. Freq. Response of Internal Nodes
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Freq. Response of Internal Nodes
Internal signal swings need to be large to max SNR
But not too large such that op amps saturate (producing distortion)

23. DR Scaling of ith Integrator (Vi)
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
DR Scaling of ith Integrator (Vi)
First find out the peak value of Vi(ω), mostly done with simulation
Then find out the ratio ki = Vi,peak/Vo,max
Multiply all capacitors connecting at Vi by ki: Fi → Fi*ki, Sij → Sij*ki, …
Divide all resistors connecting at Vi by ki: Fi → Fi*ki, Sij → Sij*ki, …
Repeat for all internal nodes…

24. Max internal signal swings all line up to Vo,max
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
After DR Scaling
Max internal signal swings all line up to Vo,max

25. Scaling for Min. Component Spread
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Scaling for Min. Component Spread
Find out the smallest cap/res connected to Xi – the summing node of Ai
determine the optimum scaling factor mi to minimize spread
Multiply all capacitors connected to Xi by mi: Fi → Fi*mi, Sji → Sji*mi, …
Divide all resistors connected to Xi by mi: Fi → Fi*mi, Sji → Sji*mi, …
Repeat for all integrators…

26. Scaling of Active Filter
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Scaling of Active Filter
DR and min spread scaling do not take op-amp loading into
account – lots of work if individual op amps are sized to meet
the settling time constraint
Upon the completion of scaling, simulation needs to be performed on the resulting filter to find out the overall SNR
If SNR is lower than the spec, capacitors and op amps need to be scaled up and resistors scaled down to meet the SNR spec (think about how integrated output noise behaves)

27. Ladder Filter Design Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Ladder Filter Design

28. Motivation Cascade filter design Ladder filter design
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Motivation
Cascade filter design
Sensitive to component variations, especially high-Q poles
Ladder filter design
Achieves zero sensitivity to component variations
Discrete CT LC filters with very high-Q poles are built with ladder structures over the years

29. Ladder Filter Reactance two-port
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Ladder Filter
Reactance two-port
Doubly terminated reactance two-port network
Delivers the optimum power matching in the passband
∂|Vout|/∂Zi = 0 for all L’s and C’s → low sensitivity

30. State Space of Ladder Filter
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
State Space of Ladder Filter
Pick –V1, -I2, V3 as the state variables for synthesis

31. Signal Flow Graph (SFG)
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Signal Flow Graph (SFG)

32. CT OP-RC Ladder Filter Three free state variables → three op amps
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
CT OP-RC Ladder Filter
Three free state variables → three op amps
A.k.a the leapfrog ladder structure

33. Transmission Zeros Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Transmission Zeros

34. Transmission Zeros Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Transmission Zeros

35. Modified SFG with Derivatives
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Modified SFG with Derivatives

36. OP-RC Ladder Filter w/ Derivatives
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
OP-RC Ladder Filter w/ Derivatives
Derivative input paths implemented with capacitors

37. Other Active Filters Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Other Active Filters

38. Tow-Thomas Biquad Low sensitivity Non-interactive tuning property
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Tow-Thomas Biquad
Low sensitivity
Non-interactive
tuning property
[1] P. E. Fleischer and J. Tow, "Design formulas for biquad active filters using three operational amplifiers,“ Proceedings of the IEEE, vol. 61, pp , issue 5, 1973.

39. Design Equations for Tow-Thomas
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Design Equations for Tow-Thomas 
Note: C1, C2, k1, k2, R8 are free parameters

40. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Sallen-Key LPF
OP-RC active filters are ideally insensitive to bottom-plate stray caps
Sallen-Key is sensitive to bottom-plate parasitics at node A and B

41. Design Equations for SK LPF
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Design Equations for SK LPF 

42. Still sensitive to parasitic capacitance at node A and B
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Sallen-Key BPF
Still sensitive to parasitic capacitance at node A and B

43. Design Equations for SK BPF
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Design Equations for SK BPF 

44. MOSFET-C Active Filter
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
MOSFET-C Active Filter

45. MOSFET Resistor MOSFET in triode region is a variable resistor
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
MOSFET Resistor
MOSFET in triode region is a variable resistor
Compact, low parasitics compared to large-value resistors

46. But the large-signal response is quite nonlinear
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
MOSFET Resistor
But the large-signal response is quite nonlinear

47. A Linear (Diff.) MOSFET Resistor
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
A Linear (Diff.) MOSFET Resistor
MOSFET resistor is linear when driven by balanced differential signals!

48. Rudell VGA + Mixer M9-M15 comprise the CMFB circuit Gain adjustment
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Rudell VGA + Mixer
M9-M15 comprise
the CMFB circuit
Gain adjustment
by varying IGain
[2] J. C. Rudell et al., “A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications,” IEEE Journal of Solid-State Circuits, vol. 32, pp , issue 12, 1997.

49. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
MOSFET-C Integrator =
Sources of M1 and M2 are ideally always equal-potential
Fully differential circuit rejects the 2nd-order harmonic (and all even-order distortions)
Triode resistance significantly depends on process (threshold, mobility, etc.), temperature, and VDD → Filter response needs tuning

50. Frequency Tuning Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Frequency Tuning

51. Subject to device mismatch between the master and slave
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Master-Slave Tuning
M1-M1' and C-C' are
matched devices
Master sets M1-C time
constant to an off-chip
reference thru f/b
Slave integrator time
constant follows that of
the master
Subject to device mismatch between the master and slave

52. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Req Matching
[3] R. Geiger, P. Allen, and N. Dinh, “Switched-resistor filters - A continuous time approach to monolithic MOS filter design,” IEEE Transactions on Circuits and Systems, vol. 29, pp , issue 5, 1982.

53. Req Matching Charge from R is continuous but discrete from Cr
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Req Matching
Charge from R is continuous but discrete from Cr
VC(t) should be sampled at the end of Ф2 and held before being applied to the MOSFET gate
LPF can be used instead of ZOH, but error will be introduced

54. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Phase Locking
[4] K. R. Rao, et al., “A novel ‘follow the master’ filter,” Proceedings of the IEEE, vol. 65, pp , issue 12, 1977.
[5] R. Geiger, P. Allen, and N. Dinh, “Switched-resistor filters - A continuous time approach to monolithic MOS filter design,” IEEE Transactions on Circuits and Systems, vol. 29, pp , issue 5, 1982.

55. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Phase Locking
Phase detector converts the phase difference b/t V1 and V2 into a pulse with bipolar average <Vp>
The trailing integrator keeps integrating when <Vp> ≠ 0 holds

56. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Phase Locking
Δφ = 90º
<Vp> = 0 holds for Δφ = 90º, -90º, … In steady state, V2 leads V1 by 90º
Negative f/b sets the pole freq. of the HPF formed by C & R to ωref

57. CT Ladder Filter Tuning
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
CT Ladder Filter Tuning
5th-order Chebyshev-I all-pole continuous-time filter
Integrators are realized by Gm-C active structures

58. Gm-C Active Integrator
Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Gm-C Active Integrator
Differential input with programmable gain constant Gm/C

59. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
Frequency Locking
[6] K.-S. Tan and P. R. Gray, "Fully integrated analog filters using bipolar-JFET technology," IEEE Journal of Solid-State Circuits, vol. SC13, pp , issue 6, 1978.

60. Advanced Analog IC Design Professor Y. Chiu
EECT Fall 2013
VCO