1. ECE 171 Digital Circuits Chapter 6 Logic Circuits
Herbert G. Mayer, PSU
Status 4/1/2018
Copied with Permission from prof. Mark PSU ECE

2. Syllabus Combinational Circuits Graphic Symbols (IEEE and IEC)
Switching Circuits
Analyzing IC Logic Circuits
Designing IC Logic Circuits
Detailed Schematic Diagrams
Using Equivalent Symbols

3. Combinational Logic Circuits
Outputs depend only upon the current inputs (not on previous “state”)
Positive Logic
High voltage (H) represents logic “True”
“Signal BusGrant is asserted High”
Negative Logic
Low voltage (L) represents logic “True”
“Signal BusRequest# is asserted Low”

4. IEEE: Institute of Electrical
and Electronics Engineers
IEC: International Electro-
technical Commission

5. n.o. = normally open n.c. = normally closed
These regenerative logic switching circuits that we’ll be seeing are actually very close to the way real CMOS ICs are implemented and can be a useful model for us without getting into the details of how the transistors actually work. In particular, note the voltage differential and direction of current flow!

13. Truth Tables Question: How many rows are there in a truth table
for n boolean variables? 2n 1 2 3 . 63
26 = 64
B5 B4 B3 B2 B1 B F .
As many rows as unique combinations
of inputs
Enumerate by counting in binary

15. Analyzing Logic Circuits
Reference Designators (“Instances”) X
X + Y
(X + Y)×(X + Z)
X + Z

16. Analyzing Logic Circuits
A×B
A×B + B×C C
B×C

17. Designing Logic Circuits
F1 = A×B×C + B×C + A×B
SOP form with 3 terms  3 input OR gate

18. Designing Logic Circuits
Complement already available
F1 = A×B×C + B×C + A×B

19. Signal line – any ‘wire’ to a gate input or output
Some Terminology
F1 = A×B×C + B×C + A×B
Signal line – any ‘wire’ to a gate input or output

20. Net – collection of signal lines which are connected
Some Terminology
F1 = A×B×C + B×C + A×B
Net – collection of signal lines which are connected

21. Fan-out – Number of other inputs an IC output is driving
Some Terminology
F1 = A×B×C + B×C + A×B
Fan-out – Number of other inputs an IC output is driving
Fan-out of 2
Book confused “fan-out” with “maximum fan-out”

22. Fan-in – Number of inputs to a gate
Some Terminology
F1 = A×B×C + B×C + A×B
Fan-in – Number of inputs to a gate
Fan-in of 3
Book confused “fan-out” with “maximum fan-out”

23. Vertical Layout – SOP Form

24. Vertical Layout – SOP Form

25. >2 Input OR Gates Not Available for all IC Technologies
Solution: “Cascading” gates

26. Vertical Layout – POS Form
F2 = ?? Do in class now

27. Vertical Layout – POS Form
F2 = (X+Y)×(X+Y)×(X+Z)

28. Using DeMorgan Equivalents
Often prefer NAND/NOR to AND/OR when using real ICs
NAND/NOR typically have more fan-in
NAND/NOR “functionally complete”
NAND/NOR usually faster than AND/OR

29. AND/OR Forms of NAND
DeMorgan’s Theorem

30. Summary of AND/OR Forms
Change OR to AND
“Complement” bubbles

31. Equivalent Signal Lines

32. NAND/NAND Example

33. NOR/NOR Example