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1 Multi-Bend Bus-Driven Floorplanning Jill H.Y.Law & Evangeline F.Y.Young The Chinese University of Hong Kong.

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Presentation on theme: "1 Multi-Bend Bus-Driven Floorplanning Jill H.Y.Law & Evangeline F.Y.Young The Chinese University of Hong Kong."— Presentation transcript:

1 1 Multi-Bend Bus-Driven Floorplanning Jill H.Y.Law & Evangeline F.Y.Young The Chinese University of Hong Kong

2 2 Outline Introduction Background Sequence Pair Methodology Shape Validation Bus Ordering Floorplan Realization Experimental Results Conclusion

3 3 Introduction

4 4 Background Why is bus-driven floorplanning important? Previous work: Hua Xiang, Xiaoping Tang and Martin D.F. Wong Bus-Driven Floorplanning ICCAD 2003 0-bend is not enough for buses going through many blocks

5 5 Problem Formulation A set of n blocks B = {b 0, b 1, …, b n-1 } A set of m buses U = {u 0, u 1, …, u m-1 }, where each bus is associated with a width t i Decide the position of blocks, such that Buses go through their blocks Chip area minimized Bus area minimized Buses can have at most 2-bends

6 6 Problem Formulation What is meant by going through ? Assume block height > bus width

7 7 Problem Formulation

8 8 Sequence Pair (SP) A pair of sequences of n elements (…a…b…, …a…b…), a is on the left of b (…a…b…, …b…a…), a is on top of b Example: (acbde, daceb)

9 9 Methodology

10 10 Overview While Temp > threshold Apply a move to obtain a new SP Evaluate the floorplan Shape Validation Bus Ordering Floorplan Realization Accept or reject according to Cost and Temp

11 11 Steps Assumption 2 layers for bus routing Evaluation Shape Validation 0-bend 1-bend 2-bend Bus Ordering Floorplan Realization

12 12 Shape Validation Check the bus one by one From the relative position of the blocks, check if a bus of at most 2 bends can go through all blocks

13 13 Shape Validation – 0 bend Step 1:Extract the related blocks from the sequence pair Example: For a bus ABE Given a SP (ABCDE, ABCED) (ABE, ABE) Step 2:Check relative position between blocks Example: For a bus ABC Horizontal bus: (ABCDE, ADEBC) (ABC, ABC) Vertical bus: (CDBEA, ABCDE) (CBA, ABC)

14 14 Shape Validation – 1 bend L-shape bus 1 horizontal component 1 vertical component How to recognize them? Step 1:Extract the related blocks (X, Y) Step 2:Find the Longest Common Subsequence (LCS) of (X, Y) Horizontal component

15 15 Shape Validation – 1 bend Step 3: Check if the remaining blocks in reverse order Example: (ABCDEF, ABCFED) LCS ABCD, remaining blocks (DEF, FED) Step 4: Check if T-shape T-shape also contains one horizontal component and one vertical component T-shape is kept for later 2-bend checking

16 16 Shape Validation – 1 bend When will a T-shape be formed?

17 17 Shape Validation – 1 bend Example: (ABCDE, ADCBE) Horizontal Component: ABE Vertical Component: CD

18 18 Shape Validation – 2 bend C-Shapes, Z-Shapes, mirrored Z-Shapes … HVH or VHV Assume HVH (VHV is similar) How to recognize them? Step 1:Extract the related blocks (X, Y) Step 2: Find the LCS of (X, Y R ) vertical Example: (ABCDE, ADCBE) Find the LCS of (ABCDE, EBCDA): BCD

19 19 Shape Validation – 2 bend Step 3: Put the remaining blocks in different relationships with the vertical component B C D E A

20 20 Shape Validation – 2 bend 8 possible relationships Step 4: Put the blocks into 2 horizontal components

21 21 Shape Validation – 2 bend Example: (GHABCEFD, EFDCBGHA) (GHABCEFD, AHGBCDFE) vertical component Upper = {A, H, G}, Lower = {D, E, F} A C-shape can be formed

22 22 Shape Validation – 2 bend Example: (AEBCDF, EDCBFA) (AEBCDF, AFBCDE) vertical component Upper = {A}, Lower = {D}, LowerLeft = {E}, LowerRight = {F} No valid 2-bend shape can be formed

23 23 Shape Validation Extract the related blocks Check if 0-bend Check if 1-bend Assume HVH Check if 2-bend Assume VHV Check if 2-bend Mark it invalid if all no

24 24 Steps Evaluation Shape Validation Bus Ordering Floorplan Realization

25 25 Determine Bus Ordering

26 26 Bus Ordering Step 1: Split all the buses into 0-bend bus components Step 2: Build vertical graph and horizontal graph by looking at each pair of bus components Use a node to represent each bus component If bus component a has to be on top of bus component b, add an edge from node a to node b If there is cycle, at least one bus component in the cycle has to be removed Horizontal graph can be built in a similar fashion

27 27 Bus Ordering Step 3: If there are cycles, remove nodes (bus components) to make the graph acyclic Aim at removing the least number of nodes NP-complete Maximum degree heuristic Step 4: Remove the corresponding bus components in the other graph as well

28 28 Steps Evaluation Shape Validation Bus Ordering Floorplan Realization

29 29 Floorplan Realization Realization = obtaining the positions of the blocks and buses This step is the same as that in Xiangs work

30 30 Simulated Annealing Simulated Annealing Framework Moves: Swap Rotation Cost Function Cost = A + B + I A: chip area, B: total bus area, I: number of invalid bus Can consider other aspects by adding more terms in the cost function Total wire length Routing congestion

31 31 Summary While Temp > threshold Apply a move to obtain a new floorplan Evaluate the floorplan Shape Validation Bus Ordering Floorplan Realization Accept or reject according to Cost and Temp

32 32 Experimental Results

33 33 Platform Language Implemented using C ++ Machine Intel Xeon (2.2 GHz) with 1 G memory MCNC benchmarks

34 34 Experimental Results The data set used in Xiangs work * calculated by [(y 1 – y 0 ) / y 0 ]*100% Xiangs WorkOur WorkComparison* Time (s)Dead spaceTime (s)Dead spaceTimeDead space apte150.72%300.48%+100.00%-33.33% xerox150.95%350.42%+133.33%-55.79% hp330.62%510.29%+54.55%-53.23% ami33-1110.94%931.00%+745.55%+6.38% ami33-2921.27%1441.19%+56.62%-6.30% ami49-1160.85%710.56%+343.75%-34.12% ami49-23020.84%7130.58%+136.09%-30.95% ami49-32851.09%8650.60%+203.51%-44.95% Average:+221.65%-31.54%

35 35 Experimental Results In this data set, each bus has to go through 10 – 15 blocks * calculated by [(y 1 – y 0 ) / y 0 ]*100% Xiangs WorkOur WorkComparison* Time (s)Dead spaceTime (s)Dead spaceTimeDead space ami33-3861.81%321.01%-62.79%-44.20% ami33-4>1000NA921.90%NA ami33-5> 1000NA953.80%NA ami49-47319.34%880.63%+20.55%-96.74% ami49-5> 1000NA2611.17%NA ami49-6> 1000NA1402.19%NA Average:1181.78%

36 36 Experimental Results ami49 – 2

37 37 Experimental Results ami49 – 3

38 38 Experimental Results ami49 – 6

39 39 Conclusion Solve the bus-driven floorplanning problem for 0-bend, 1-bend, 2-bend buses The presence of 1-bend and 2-bend buses is important, especially when the number of blocks that a bus goes through is large


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